clocking-wizard: Add versal clocking wizard support

Add versal clocking wizard support Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> State: pending [michals: Squashed with clocking-wizard: Fix the read path clocking-wizard: Use readl_polled timeout clocking-wizard: fix some spacing errors clocking-wizard: Support higher frequency accuracy ]
Xilinx · Feb 1, 2022 · 8b53837 · 8b53837
1 parent e6b8062
commit 8b53837
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diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
@@ -427,7 +427,13 @@ config COMMON_CLK_XLNX_CLKWZRD
 	depends on COMMON_CLK && OF
 	help
 	  Support for the Xilinx Clocking Wizard IP core clock generator.
-	  Adds support for clocking wizard and compatible.
+
+config COMMON_CLK_XLNX_CLKWZRD_V
+	tristate "Xilinx Versal Clocking Wizard"
+	depends on COMMON_CLK && OF
+	help
+	  Support for the Versal Xilinx Clocking Wizard IP core clock generator.
+	  Adds support for Versal clocking wizard 1.0 and compatible.
 	  This driver supports the Xilinx clocking wizard programmable clock
 	  synthesizer. The number of output is configurable in the design.
 

diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
@@ -71,6 +71,7 @@ obj-$(CONFIG_COMMON_CLK_VC5)		+= clk-versaclock5.o
 obj-$(CONFIG_COMMON_CLK_WM831X)		+= clk-wm831x.o
 obj-$(CONFIG_COMMON_CLK_XGENE)		+= clk-xgene.o
 obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD)	+= clk-xlnx-clock-wizard.o
+obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD_V)	+= clk-xlnx-clock-wizard-v.o
 
 # please keep this section sorted lexicographically by directory path name
 obj-y					+= actions/