Skip to content

Commit

Permalink
mtd: spi-nor: Add stacked memories support in spi-nor
Browse files Browse the repository at this point in the history
Each flash that is connected in stacked mode should have a separate
parameter structure. So, the flash parameter member(*params) of the spi_nor
structure is changed to an array (*params[2]). The array is used to store
the parameters of each flash connected in stacked configuration.

The current implementation assumes that a maximum of two flashes are
connected in stacked mode and both the flashes are of same make but can
differ in sizes. So, except the sizes all other flash parameters of both
the flashes are identical.

SPI-NOR is not aware of the chip_select values, for any incoming request
SPI-NOR will decide the flash index with the help of individual flash size
and the configuration type (single/stacked). SPI-NOR will pass on the flash
index information to the SPI core & SPI driver by setting the appropriate
bit in nor->spimem->spi->cs_index_mask. For example, if nth bit of
nor->spimem->spi->cs_index_mask is set then the driver would
assert/de-assert spi->chip_slect[n].

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
Link: https://lore.kernel.org/all/20230119185342.2093323-1-amit.kumar-mahapatra@amd.com/
State: waiting
  • Loading branch information
Amit Kumar Mahapatra authored and michalsimek committed Jan 25, 2023
1 parent 90a7e88 commit cce0e6d
Show file tree
Hide file tree
Showing 4 changed files with 240 additions and 50 deletions.

0 comments on commit cce0e6d

Please sign in to comment.