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spi: spi-xilinx: Fix spi timeout issue with threaded irq enabled
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The interrupt handler of the driver currently does a transfer finalize
before disabling the SPI interrupt.  With threaded interrupts enabled this
can allow the SPI core to start a new SPI transfer between the transfer
finalize and the interrupt disable, transfer completion interrupt for the
current transfer will never occur which results in SPI timeout.
This patch fixes the issue by disabling the SPI interrupts before
finalizing the transfer.

Currently we don't have ZynqMP AXI-QSPI setup to test threaded irq usecase.
This fix is validated on customer's ZynqMP AXI-QSPI design.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
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Amit Kumar Mahapatra authored and michalsimek committed Aug 2, 2022
1 parent 0bb1fe9 commit f288d69
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion drivers/spi/spi-xilinx.c
Expand Up @@ -631,9 +631,9 @@ static irqreturn_t xilinx_spi_irq(int irq, void *dev_id)
}

if (!xspi->bytes_to_receive && !xspi->bytes_to_transfer) {
spi_finalize_current_transfer(master);
/* Disable the interrupts here. */
xspi->write_fn(0x0, xspi->regs + XIPIF_V123B_DGIER_OFFSET);
spi_finalize_current_transfer(master);
}

return status;
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