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Merge branch 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/li…
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…nux/kernel/git/kgene/linux-samsung

* 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: S5PV210: Fix regulator names
  ARM: S5PV210: Update max8998_platform_data
  ARM: SAMSUNG: Drop exporting s3c24xx_ts_set_platdata
  ARM: S5P: Fix end address in memory resource information for UART devices
  ARM: S5P64X0: Cleanup map.h file
  ARM: S5P6442: Cleanup map.h file
  ARM: S5PC100: Clenaup map.h file
  ARM: S5PV210: Cleanup map.h file
  ARM: S5PV310: Cleanup map.h file
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@torvalds
torvalds committed Feb 21, 2011
2 parents b4f5c46 + d106133 commit b08b69a
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Showing 9 changed files with 342 additions and 363 deletions.
69 changes: 37 additions & 32 deletions arch/arm/mach-s5p6442/include/mach/map.h
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@@ -1,6 +1,6 @@
/* linux/arch/arm/mach-s5p6442/include/mach/map.h
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* S5P6442 - Memory map definitions
Expand All @@ -16,56 +16,61 @@
#include <plat/map-base.h>
#include <plat/map-s5p.h>

#define S5P6442_PA_CHIPID (0xE0000000)
#define S5P_PA_CHIPID S5P6442_PA_CHIPID
#define S5P6442_PA_SDRAM 0x20000000

#define S5P6442_PA_SYSCON (0xE0100000)
#define S5P_PA_SYSCON S5P6442_PA_SYSCON
#define S5P6442_PA_I2S0 0xC0B00000
#define S5P6442_PA_I2S1 0xF2200000

#define S5P6442_PA_GPIO (0xE0200000)
#define S5P6442_PA_CHIPID 0xE0000000

#define S5P6442_PA_VIC0 (0xE4000000)
#define S5P6442_PA_VIC1 (0xE4100000)
#define S5P6442_PA_VIC2 (0xE4200000)
#define S5P6442_PA_SYSCON 0xE0100000

#define S5P6442_PA_SROMC (0xE7000000)
#define S5P_PA_SROMC S5P6442_PA_SROMC
#define S5P6442_PA_GPIO 0xE0200000

#define S5P6442_PA_MDMA 0xE8000000
#define S5P6442_PA_PDMA 0xE9000000
#define S5P6442_PA_VIC0 0xE4000000
#define S5P6442_PA_VIC1 0xE4100000
#define S5P6442_PA_VIC2 0xE4200000

#define S5P6442_PA_TIMER (0xEA000000)
#define S5P_PA_TIMER S5P6442_PA_TIMER
#define S5P6442_PA_SROMC 0xE7000000

#define S5P6442_PA_SYSTIMER (0xEA100000)
#define S5P6442_PA_MDMA 0xE8000000
#define S5P6442_PA_PDMA 0xE9000000

#define S5P6442_PA_WATCHDOG (0xEA200000)
#define S5P6442_PA_TIMER 0xEA000000

#define S5P6442_PA_UART (0xEC000000)
#define S5P6442_PA_SYSTIMER 0xEA100000

#define S5P_PA_UART0 (S5P6442_PA_UART + 0x0)
#define S5P_PA_UART1 (S5P6442_PA_UART + 0x400)
#define S5P_PA_UART2 (S5P6442_PA_UART + 0x800)
#define S5P_SZ_UART SZ_256
#define S5P6442_PA_WATCHDOG 0xEA200000

#define S5P6442_PA_IIC0 (0xEC100000)
#define S5P6442_PA_UART 0xEC000000

#define S5P6442_PA_SDRAM (0x20000000)
#define S5P_PA_SDRAM S5P6442_PA_SDRAM
#define S5P6442_PA_IIC0 0xEC100000

#define S5P6442_PA_SPI 0xEC300000

/* I2S */
#define S5P6442_PA_I2S0 0xC0B00000
#define S5P6442_PA_I2S1 0xF2200000

/* PCM */
#define S5P6442_PA_PCM0 0xF2400000
#define S5P6442_PA_PCM1 0xF2500000

/* compatibiltiy defines. */
/* Compatibiltiy Defines */

#define S3C_PA_IIC S5P6442_PA_IIC0
#define S3C_PA_WDT S5P6442_PA_WATCHDOG

#define S5P_PA_CHIPID S5P6442_PA_CHIPID
#define S5P_PA_SDRAM S5P6442_PA_SDRAM
#define S5P_PA_SROMC S5P6442_PA_SROMC
#define S5P_PA_SYSCON S5P6442_PA_SYSCON
#define S5P_PA_TIMER S5P6442_PA_TIMER

/* UART */

#define S3C_PA_UART S5P6442_PA_UART
#define S3C_PA_IIC S5P6442_PA_IIC0

#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
#define S5P_PA_UART0 S5P_PA_UART(0)
#define S5P_PA_UART1 S5P_PA_UART(1)
#define S5P_PA_UART2 S5P_PA_UART(2)

#define S5P_SZ_UART SZ_256

#endif /* __ASM_ARCH_MAP_H */
83 changes: 42 additions & 41 deletions arch/arm/mach-s5p64x0/include/mach/map.h
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@@ -1,6 +1,6 @@
/* linux/arch/arm/mach-s5p64x0/include/mach/map.h
*
* Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
* Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* S5P64X0 - Memory map definitions
Expand All @@ -16,64 +16,46 @@
#include <plat/map-base.h>
#include <plat/map-s5p.h>

#define S5P64X0_PA_SDRAM (0x20000000)
#define S5P64X0_PA_SDRAM 0x20000000

#define S5P64X0_PA_CHIPID (0xE0000000)
#define S5P_PA_CHIPID S5P64X0_PA_CHIPID

#define S5P64X0_PA_SYSCON (0xE0100000)
#define S5P_PA_SYSCON S5P64X0_PA_SYSCON

#define S5P64X0_PA_GPIO (0xE0308000)

#define S5P64X0_PA_VIC0 (0xE4000000)
#define S5P64X0_PA_VIC1 (0xE4100000)
#define S5P64X0_PA_CHIPID 0xE0000000

#define S5P64X0_PA_SROMC (0xE7000000)
#define S5P_PA_SROMC S5P64X0_PA_SROMC

#define S5P64X0_PA_PDMA (0xE9000000)

#define S5P64X0_PA_TIMER (0xEA000000)
#define S5P_PA_TIMER S5P64X0_PA_TIMER
#define S5P64X0_PA_SYSCON 0xE0100000

#define S5P64X0_PA_RTC (0xEA100000)
#define S5P64X0_PA_GPIO 0xE0308000

#define S5P64X0_PA_WDT (0xEA200000)
#define S5P64X0_PA_VIC0 0xE4000000
#define S5P64X0_PA_VIC1 0xE4100000

#define S5P6440_PA_UART(x) (0xEC000000 + ((x) * S3C_UART_OFFSET))
#define S5P6450_PA_UART(x) ((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000))
#define S5P64X0_PA_SROMC 0xE7000000

#define S5P_PA_UART0 S5P6450_PA_UART(0)
#define S5P_PA_UART1 S5P6450_PA_UART(1)
#define S5P_PA_UART2 S5P6450_PA_UART(2)
#define S5P_PA_UART3 S5P6450_PA_UART(3)
#define S5P_PA_UART4 S5P6450_PA_UART(4)
#define S5P_PA_UART5 S5P6450_PA_UART(5)
#define S5P64X0_PA_PDMA 0xE9000000

#define S5P_SZ_UART SZ_256
#define S5P64X0_PA_TIMER 0xEA000000
#define S5P64X0_PA_RTC 0xEA100000
#define S5P64X0_PA_WDT 0xEA200000

#define S5P6440_PA_IIC0 (0xEC104000)
#define S5P6440_PA_IIC1 (0xEC20F000)
#define S5P6450_PA_IIC0 (0xEC100000)
#define S5P6450_PA_IIC1 (0xEC200000)
#define S5P6440_PA_IIC0 0xEC104000
#define S5P6440_PA_IIC1 0xEC20F000
#define S5P6450_PA_IIC0 0xEC100000
#define S5P6450_PA_IIC1 0xEC200000

#define S5P64X0_PA_SPI0 (0xEC400000)
#define S5P64X0_PA_SPI1 (0xEC500000)
#define S5P64X0_PA_SPI0 0xEC400000
#define S5P64X0_PA_SPI1 0xEC500000

#define S5P64X0_PA_HSOTG (0xED100000)
#define S5P64X0_PA_HSOTG 0xED100000

#define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000))

#define S5P64X0_PA_I2S (0xF2000000)
#define S5P64X0_PA_I2S 0xF2000000
#define S5P6450_PA_I2S1 0xF2800000
#define S5P6450_PA_I2S2 0xF2900000

#define S5P64X0_PA_PCM (0xF2100000)
#define S5P64X0_PA_PCM 0xF2100000

#define S5P64X0_PA_ADC (0xF3000000)
#define S5P64X0_PA_ADC 0xF3000000

/* compatibiltiy defines. */
/* Compatibiltiy Defines */

#define S3C_PA_HSMMC0 S5P64X0_PA_HSMMC(0)
#define S3C_PA_HSMMC1 S5P64X0_PA_HSMMC(1)
Expand All @@ -83,6 +65,25 @@
#define S3C_PA_RTC S5P64X0_PA_RTC
#define S3C_PA_WDT S5P64X0_PA_WDT

#define S5P_PA_CHIPID S5P64X0_PA_CHIPID
#define S5P_PA_SROMC S5P64X0_PA_SROMC
#define S5P_PA_SYSCON S5P64X0_PA_SYSCON
#define S5P_PA_TIMER S5P64X0_PA_TIMER

#define SAMSUNG_PA_ADC S5P64X0_PA_ADC

/* UART */

#define S5P6440_PA_UART(x) (0xEC000000 + ((x) * S3C_UART_OFFSET))
#define S5P6450_PA_UART(x) ((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000))

#define S5P_PA_UART0 S5P6450_PA_UART(0)
#define S5P_PA_UART1 S5P6450_PA_UART(1)
#define S5P_PA_UART2 S5P6450_PA_UART(2)
#define S5P_PA_UART3 S5P6450_PA_UART(3)
#define S5P_PA_UART4 S5P6450_PA_UART(4)
#define S5P_PA_UART5 S5P6450_PA_UART(5)

#define S5P_SZ_UART SZ_256

#endif /* __ASM_ARCH_MAP_H */
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