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Fix bugs in CPUID caching in SVM-Core.
Omit unimportant debug message during searching exported procedures.
Add Enable/Disable CPUID Caching Options.
Specifies that NoirVisor does not conform Microsoft Hypervisor TLFS.
Close issue #3 since I plan not to conform it at this point.
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Zero-Tang committed Mar 22, 2020
1 parent 33194fb commit 055dab6
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16 changes: 8 additions & 8 deletions compchk_win7x64.bat
Original file line number Diff line number Diff line change
Expand Up @@ -18,22 +18,22 @@ echo Compiling Windows Driver Framework...
%ddkpath%\amd64\cl.exe .\src\booting\windrv\driver.c /I"%incpath%\crt" /I"%incpath%\api" /I"%incpath%\ddk" /Zi /nologo /W3 /WX /Od /Oy- /D"_AMD64_" /D"_M_AMD64" /D"_WIN64" /D "_NDEBUG" /D"_UNICODE" /D "UNICODE" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\driver.cod" /Fo"%objpath%\driver.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue

echo Compiling Core Engine of Intel VT-x...
%ddkpath%\amd64\cl.exe .\src\vt_core\vt_main.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /Od /D"_msvc" /D"_amd64" /D"_vt_drv" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\vt_main.cod" /Fo"%objpath%\vt_main.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue
%ddkpath%\amd64\cl.exe .\src\vt_core\vt_main.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /Od /D"_msvc" /D"_amd64" /D"_vt_core" /D"_vt_drv" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\vt_main.cod" /Fo"%objpath%\vt_main.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue

%ddkpath%\amd64\cl.exe .\src\vt_core\vt_exit.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /Od /D"_msvc" /D"_amd64" /D"_vt_exit" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\vt_exit.cod" /Fo"%objpath%\vt_exit.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue
%ddkpath%\amd64\cl.exe .\src\vt_core\vt_exit.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /Od /D"_msvc" /D"_amd64" /D"_vt_core" /D"_vt_exit" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\vt_exit.cod" /Fo"%objpath%\vt_exit.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue

%ddkpath%\amd64\cl.exe .\src\vt_core\vt_ept.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /Od /D"_msvc" /D"_amd64" /D"_vt_ept" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\vt_ept.cod" /Fo"%objpath%\vt_ept.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue
%ddkpath%\amd64\cl.exe .\src\vt_core\vt_ept.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /Od /D"_msvc" /D"_amd64" /D"_vt_core" /D"_vt_ept" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\vt_ept.cod" /Fo"%objpath%\vt_ept.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue

%ddkpath%\amd64\cl.exe .\src\vt_core\vt_nvcpu.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /Od /D"_msvc" /D"_amd64" /D"_vt_nvcpu" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\vt_nvcpu.cod" /Fo"%objpath%\vt_nvcpu.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue
%ddkpath%\amd64\cl.exe .\src\vt_core\vt_nvcpu.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /Od /D"_msvc" /D"_amd64" /D"_vt_core" /D"_vt_nvcpu" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\vt_nvcpu.cod" /Fo"%objpath%\vt_nvcpu.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue

echo Compiling Core Engine of AMD-V...
%ddkpath%\amd64\cl.exe .\src\svm_core\svm_main.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /Od /D"_msvc" /D"_amd64" /D"_svm_drv" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\svm_main.cod" /Fo"%objpath%\svm_main.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue
%ddkpath%\amd64\cl.exe .\src\svm_core\svm_main.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /Od /D"_msvc" /D"_amd64" /D"_svm_core" /D"_svm_drv" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\svm_main.cod" /Fo"%objpath%\svm_main.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue

%ddkpath%\amd64\cl.exe .\src\svm_core\svm_exit.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /Od /D"_msvc" /D"_amd64" /D"_svm_exit" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\svm_exit.cod" /Fo"%objpath%\svm_exit.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue
%ddkpath%\amd64\cl.exe .\src\svm_core\svm_exit.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /Od /D"_msvc" /D"_amd64" /D"_svm_core" /D"_svm_exit" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\svm_exit.cod" /Fo"%objpath%\svm_exit.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue

%ddkpath%\amd64\cl.exe .\src\svm_core\svm_cpuid.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /Od /D"_msvc" /D"_amd64" /D"_svm_exit" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\svm_cpuid.cod" /Fo"%objpath%\svm_cpuid.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue
%ddkpath%\amd64\cl.exe .\src\svm_core\svm_cpuid.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /Od /D"_msvc" /D"_amd64" /D"_svm_core" /D"_svm_cpuid" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\svm_cpuid.cod" /Fo"%objpath%\svm_cpuid.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue

%ddkpath%\amd64\cl.exe .\src\svm_core\svm_npt.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /Od /D"_msvc" /D"_amd64" /D"_svm_npt" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\svm_npt.cod" /Fo"%objpath%\svm_npt.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue
%ddkpath%\amd64\cl.exe .\src\svm_core\svm_npt.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /Od /D"_msvc" /D"_amd64" /D"_svm_core" /D"_svm_npt" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\svm_npt.cod" /Fo"%objpath%\svm_npt.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue

echo Compiling Core of Cross-Platform Framework (XPF)...
%ddkpath%\amd64\cl.exe .\src\xpf_core\windows\nvsys.c /I"%incpath%\crt" /I"%incpath%\api" /I"%incpath%\ddk" /Zi /nologo /W3 /WX /Od /D"_AMD64_" /D"_M_AMD64" /D"_WIN64" /D "_NDEBUG" /D"_UNICODE" /D "UNICODE" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\nvsys.cod" /Fo"%objpath%\nvsys.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gr /TC /c /errorReport:queue
Expand Down
16 changes: 8 additions & 8 deletions compfre_win7x64.bat
Original file line number Diff line number Diff line change
Expand Up @@ -18,22 +18,22 @@ echo Compiling Windows Driver Framework...
%ddkpath%\amd64\cl.exe .\src\booting\windrv\driver.c /I"%incpath%\crt" /I"%incpath%\api" /I"%incpath%\ddk" /Zi /nologo /W3 /WX /O2 /Oy- /D"_AMD64_" /D"_M_AMD64" /D"_WIN64" /D "_NDEBUG" /D"_UNICODE" /D "UNICODE" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\driver.cod" /Fo"%objpath%\driver.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue

echo Compiling Core Engine of Intel VT-x...
%ddkpath%\amd64\cl.exe .\src\vt_core\vt_main.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /O2 /favor:INTEL64 /D"_msvc" /D"_amd64" /D"_vt_drv" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\vt_main.cod" /Fo"%objpath%\vt_main.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue
%ddkpath%\amd64\cl.exe .\src\vt_core\vt_main.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /O2 /favor:INTEL64 /D"_msvc" /D"_amd64" /D"_vt_core" /D"_vt_drv" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\vt_main.cod" /Fo"%objpath%\vt_main.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue

%ddkpath%\amd64\cl.exe .\src\vt_core\vt_exit.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /O2 /favor:INTEL64 /D"_msvc" /D"_amd64" /D"_vt_exit" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\vt_exit.cod" /Fo"%objpath%\vt_exit.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue
%ddkpath%\amd64\cl.exe .\src\vt_core\vt_exit.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /O2 /favor:INTEL64 /D"_msvc" /D"_amd64" /D"_vt_core" /D"_vt_exit" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\vt_exit.cod" /Fo"%objpath%\vt_exit.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue

%ddkpath%\amd64\cl.exe .\src\vt_core\vt_ept.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /O2 /favor:INTEL64 /D"_msvc" /D"_amd64" /D"_vt_ept" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\vt_ept.cod" /Fo"%objpath%\vt_ept.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue
%ddkpath%\amd64\cl.exe .\src\vt_core\vt_ept.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /O2 /favor:INTEL64 /D"_msvc" /D"_amd64" /D"_vt_core" /D"_vt_ept" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\vt_ept.cod" /Fo"%objpath%\vt_ept.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue

%ddkpath%\amd64\cl.exe .\src\vt_core\vt_nvcpu.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /O2 /favor:INTEL64 /D"_msvc" /D"_amd64" /D"_vt_nvcpu" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\vt_nvcpu.cod" /Fo"%objpath%\vt_nvcpu.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue
%ddkpath%\amd64\cl.exe .\src\vt_core\vt_nvcpu.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /O2 /favor:INTEL64 /D"_msvc" /D"_amd64" /D"_vt_core" /D"_vt_nvcpu" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\vt_nvcpu.cod" /Fo"%objpath%\vt_nvcpu.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue

echo Compiling Core Engine of AMD-V...
%ddkpath%\amd64\cl.exe .\src\svm_core\svm_main.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /O2 /favor:AMD64 /D"_msvc" /D"_amd64" /D"_svm_drv" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\svm_main.cod" /Fo"%objpath%\svm_main.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue
%ddkpath%\amd64\cl.exe .\src\svm_core\svm_main.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /O2 /favor:AMD64 /D"_msvc" /D"_amd64" /D"_svm_core" /D"_svm_drv" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\svm_main.cod" /Fo"%objpath%\svm_main.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue

%ddkpath%\amd64\cl.exe .\src\svm_core\svm_exit.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /O2 /favor:AMD64 /D"_msvc" /D"_amd64" /D"_svm_exit" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\svm_exit.cod" /Fo"%objpath%\svm_exit.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue
%ddkpath%\amd64\cl.exe .\src\svm_core\svm_exit.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /O2 /favor:AMD64 /D"_msvc" /D"_amd64" /D"_svm_core" /D"_svm_exit" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\svm_exit.cod" /Fo"%objpath%\svm_exit.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue

%ddkpath%\amd64\cl.exe .\src\svm_core\svm_cpuid.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /O2 /favor:AMD64 /D"_msvc" /D"_amd64" /D"_svm_exit" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\svm_cpuid.cod" /Fo"%objpath%\svm_cpuid.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue
%ddkpath%\amd64\cl.exe .\src\svm_core\svm_cpuid.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /O2 /favor:AMD64 /D"_msvc" /D"_amd64" /D"_svm_core" /D"_svm_exit" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\svm_cpuid.cod" /Fo"%objpath%\svm_cpuid.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue

%ddkpath%\amd64\cl.exe .\src\svm_core\svm_npt.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /O2 /favor:AMD64 /D"_msvc" /D"_amd64" /D"_svm_exit" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\svm_npt.cod" /Fo"%objpath%\svm_npt.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue
%ddkpath%\amd64\cl.exe .\src\svm_core\svm_npt.c /I".\src\include" /Zi /nologo /W3 /WX /Oi /O2 /favor:AMD64 /D"_msvc" /D"_amd64" /D"_svm_core" /D"_svm_exit" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\svm_npt.cod" /Fo"%objpath%\svm_npt.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue

echo Compiling Core of Cross-Platform Framework (XPF)...
%ddkpath%\amd64\cl.exe .\src\xpf_core\windows\nvsys.c /I"%incpath%\crt" /I"%incpath%\api" /I"%incpath%\ddk" /Zi /nologo /W3 /WX /O2 /D"_AMD64_" /D"_M_AMD64" /D"_WIN64" /D "_NDEBUG" /D"_UNICODE" /D "UNICODE" /Zc:wchar_t /Zc:forScope /FAcs /Fa"%objpath%\nvsys.cod" /Fo"%objpath%\nvsys.obj" /Fd"%objpath%\vc90.pdb" /GS- /Gy /Gr /TC /c /errorReport:queue
Expand Down
8 changes: 4 additions & 4 deletions src/include/noirhvm.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,9 +13,9 @@
*/

#include "nvdef.h"
#if defined(_vt_drv) || defined(_vt_exit) || defined(_vt_ept) || defined(_vt_nvcpu)
#if defined(_vt_core)
#include "vt_hvm.h"
#elif defined(_svm_drv) || defined(_svm_exit) || defined(_svm_npt)
#elif defined(_svm_core)
#include "svm_hvm.h"
#endif

Expand Down Expand Up @@ -49,10 +49,10 @@

typedef struct _noir_hypervisor
{
#if defined(_vt_drv) || defined(_vt_exit) || defined(_vt_ept)
#if defined(_vt_core)
noir_vt_vcpu_p virtual_cpu;
noir_vt_hvm_p relative_hvm;
#elif defined(_svm_drv) || defined(_svm_exit) || defined(_svm_npt)
#elif defined(_svm_core)
noir_svm_vcpu_p virtual_cpu;
noir_svm_hvm_p relative_hvm;
#else
Expand Down
2 changes: 2 additions & 0 deletions src/include/svm_hvm.h
Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,7 @@
#define noir_svm_flush_by_asid 4 // Bit 2
#define noir_svm_virtual_gif 8 // Bit 3
#define noir_svm_virtualized_vmls 16 // Bit 4
#define noir_svm_cpuid_caching 32 // Bit 5

typedef struct _memory_descriptor
{
Expand All @@ -42,6 +43,7 @@ typedef struct _noir_svm_hvm
void* primary_nptm;
void* secondary_nptm;
u32 std_leaftotal;
u32 hvm_leaftotal;
u32 ext_leaftotal;
}noir_svm_hvm,*noir_svm_hvm_p;

Expand Down
92 changes: 76 additions & 16 deletions src/svm_core/svm_cpuid.c
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,7 @@
#include <intrin.h>
#include <amd64.h>
#include "svm_vmcb.h"
#include "svm_exit.h"
#include "svm_cpuid.h"

/*
Expand Down Expand Up @@ -59,6 +60,9 @@ void nvc_svm_build_cpuid_cache_per_vcpu(noir_svm_vcpu_p vcpu)
// We indicate hypervisor presense here.
info=(noir_svm_cpuid_default_p)vcpu->cpuid_cache.std_leaf[std_proc_feature];
noir_bts(&info->ecx,amd64_cpuid_hv_presence);
// Function leaf 0x7 - Structured Extended Feature Identifiers
// There is only one subleaf in this function leaf.

// Function leaf 0xD - Processor Extended State Enumeration
// There are multiple subfunctions in this leaf.
info=(noir_svm_cpuid_default_p)vcpu->cpuid_cache.std_leaf[std_pestate_enum];
Expand All @@ -67,22 +71,26 @@ void nvc_svm_build_cpuid_cache_per_vcpu(noir_svm_vcpu_p vcpu)
noir_cpuid(std_pestate_enum,62,&info[3].eax,&info[3].ebx,&info[3].ecx,&info[3].edx); // Sub-leaf 62
// Function leaf 0x40000000 - Maximum Hypervisor Function Number and Vendor String
info=(noir_svm_cpuid_default_p)vcpu->cpuid_cache.hvm_leaf[hvm_max_num_vstr];
info->eax=0; // We have this leaf only.
info->eax=0x40000001; // Indicate the highest function leaf.
// Vendor String="NoirVisor ZT"
info->ebx='rioN';
info->ecx='osiV';
info->edx='TZ r';
// Function leaf 0x40000001 - Hypervisor Vendor-Neutral Interface Identification
info=(noir_svm_cpuid_default_p)vcpu->cpuid_cache.hvm_leaf[hvm_interface_id];
info->eax='0#vH'; // Hypervisor Interface Signature - Indicate Non-Conformance to Microsoft TLFS
info->ebx=info->ecx=info->edx=0; // They are reserved values
// Function leaf 0x80000001 - Extended Processor and Processor Feature Identifiers
// By now, we might have to indicate no support to nested virtualization.
info=(noir_svm_cpuid_default_p)vcpu->cpuid_cache.ext_leaf[ext_proc_feature];
noir_btr(&info->ecx,amd64_cpuid_svm);
// Function leaf 0x8000000A - SVM Features
// Erase some features that we don't support.
// Erase some features that we don't have algorithms to support.
info=(noir_svm_cpuid_default_p)vcpu->cpuid_cache.ext_leaf[ext_svm_features];
info->ebx--; // Decrement available ASID by 1.
noir_btr(&info->edx,amd64_cpuid_npt); // NoirVisor does not have an algorithm to it.
// Function leaf 0x8000001D - Cache Topology Information
// This is variable count of subfunctions.
// This leaf includes variable count of subfunctions.
info=(noir_svm_cpuid_default_p)vcpu->cpuid_cache.ext_leaf[ext_cache_topinf];
for(i=1;(info[i-1].eax & 0x1f)!=0;i++)
{
Expand Down Expand Up @@ -122,14 +130,21 @@ void static fastcall nvc_svm_default_cpuid_handler(noir_gpr_state_p gpr_state,no
cache=(noir_svm_cpuid_default_p)vcpu->cpuid_cache.std_leaf[leaf_index];
break;
}
case hvm_leaf_index:
{
cache=(noir_svm_cpuid_default_p)vcpu->cpuid_cache.hvm_leaf[leaf_index];
break;
}
case ext_leaf_index:
{
cache=(noir_svm_cpuid_default_p)vcpu->cpuid_cache.ext_leaf[leaf_index];
break;
}
default:
{
// In principle, this branch is impossible to reach.
cache=null;
noir_int3();
break;
}
}
Expand Down Expand Up @@ -159,6 +174,37 @@ void static fastcall nvc_svm_cpuid_std_vendor_string(noir_gpr_state_p gpr_state,
*(u32*)&gpr_state->rdx=*(u32*)&cache->vendor_string[4];
}

// Function Leaf: 0x00000007 - Structured Extended Feature Identifiers
// This leaf has multiple subleaves, so we have to make special treatments during caching.
void static fastcall nvc_svm_cpuid_std_struct_extid(noir_gpr_state_p gpr_state,noir_svm_vcpu_p vcpu)
{
noir_svm_cpuid_default_p cache=(noir_svm_cpuid_default_p)vcpu->cpuid_cache.std_leaf[std_struct_extid];
*(u32*)&gpr_state->rax=cache->eax;
*(u32*)&gpr_state->rbx=cache->ebx;
*(u32*)&gpr_state->rcx=cache->ecx;
*(u32*)&gpr_state->rdx=cache->edx;
}

// Function Leaf: 0x0000000D - Processor Extended State Enumeration
// This leaf has multiple subleaves, so we have to make special treatments during caching.
void static fastcall nvc_svm_cpuid_std_pestate_enum(noir_gpr_state_p gpr_state,noir_svm_vcpu_p vcpu)
{
noir_svm_cpuid_default_p cache=(noir_svm_cpuid_default_p)vcpu->cpuid_cache.std_leaf[std_pestate_enum];
u32 subleaf=(u32)gpr_state->rcx;
// We need to adjust index for compacted cache array.
if(subleaf>2)
{
if(subleaf==62)
subleaf=3; // SubLeaf=62 is cached to index=3
else
subleaf=4; // index=4 has zeroed data.
}
*(u32*)&gpr_state->rax=cache[subleaf].eax;
*(u32*)&gpr_state->rbx=cache[subleaf].ebx;
*(u32*)&gpr_state->rcx=cache[subleaf].ecx;
*(u32*)&gpr_state->rdx=cache[subleaf].edx;
}

/*
Hypervisor Leaf Functions:
Expand All @@ -168,18 +214,6 @@ void static fastcall nvc_svm_cpuid_std_vendor_string(noir_gpr_state_p gpr_state,
by now, is not in conformation.
*/

// Function Leaf: 0x40000000 - Maxinum Number of Leaves and Vendor String
void static fastcall nvc_svm_cpuid_hvm_vendor_string(noir_gpr_state_p gpr_state,noir_svm_vcpu_p vcpu)
{
noir_svm_cpuid_max_num_vstr_p cache=(noir_svm_cpuid_max_num_vstr_p)vcpu->cpuid_cache.hvm_leaf[hvm_max_num_vstr];
// EAX - Maximum Number of CPUID
*(u32*)&gpr_state->rax=cache->maximum;
// EBX-ECX-EDX -> "NoirVisor ZT" by default
*(u32*)&gpr_state->rbx=*(u32*)&cache->vendor_string[0];
*(u32*)&gpr_state->rcx=*(u32*)&cache->vendor_string[4];
*(u32*)&gpr_state->rdx=*(u32*)&cache->vendor_string[8];
}

/*
Extended Leaf Functions:
Expand Down Expand Up @@ -247,6 +281,30 @@ void static fastcall nvc_svm_cpuid_ext_svm_feature_id(noir_gpr_state_p gpr_state
*(u32*)&gpr_state->rdx=cache->feature_id;
}

// Function Leaf: 0x8000001D - Cache Topology Information
// This leaf has multiple subleaves, so we have to make special treatments during caching.
void static fastcall nvc_svm_cpuid_ext_cache_topinf(noir_gpr_state_p gpr_state,noir_svm_vcpu_p vcpu)
{
noir_svm_cpuid_default_p cache=(noir_svm_cpuid_default_p)vcpu->cpuid_cache.ext_leaf[ext_cache_topinf];
u32 subleaf=(u32)gpr_state->rcx;
if(subleaf>0 && subleaf<8)
{
if(cache[subleaf-1].eax & 0x1f)
{
// This subleaf is valid.
*(u32*)&gpr_state->rax=cache[subleaf].eax;
*(u32*)&gpr_state->rbx=cache[subleaf].ebx;
*(u32*)&gpr_state->rcx=cache[subleaf].ecx;
*(u32*)&gpr_state->rdx=cache[subleaf].edx;
}
else
{
// This subleaf is invalid. As defined by AMD64, raise #UD.
noir_svm_inject_event(vcpu->vmcb.virt,amd64_invalid_opcode,amd64_fault_trap_exception,false,true,0);
}
}
}

bool nvc_svm_build_cpuid_handler(u32 std_count,u32 hvm_count,u32 ext_count,u32 res_count)
{
svm_cpuid_handlers=noir_alloc_nonpg_memory(sizeof(void*)*4);
Expand All @@ -263,8 +321,10 @@ bool nvc_svm_build_cpuid_handler(u32 std_count,u32 hvm_count,u32 ext_count,u32 r
noir_stosp(svm_cpuid_handlers[hvm_leaf_index],(ulong_ptr)nvc_svm_default_cpuid_handler,hvm_count);
noir_stosp(svm_cpuid_handlers[ext_leaf_index],(ulong_ptr)nvc_svm_default_cpuid_handler,ext_count);
// Default Handlers are set. Setup the customized handlers here.
svm_cpuid_handlers[std_leaf_index][std_struct_extid]=nvc_svm_cpuid_std_struct_extid;
svm_cpuid_handlers[std_leaf_index][std_pestate_enum]=nvc_svm_cpuid_std_pestate_enum;
svm_cpuid_handlers[ext_leaf_index][ext_svm_features]=nvc_svm_cpuid_ext_svm_feature_id;
svm_cpuid_handlers[hvm_leaf_index][hvm_max_num_vstr]=nvc_svm_cpuid_hvm_vendor_string;
svm_cpuid_handlers[ext_leaf_index][ext_cache_topinf]=nvc_svm_cpuid_ext_cache_topinf;
return true;
}
}
Expand Down
5 changes: 4 additions & 1 deletion src/svm_core/svm_cpuid.h
Original file line number Diff line number Diff line change
Expand Up @@ -47,6 +47,7 @@

// Index of Hypervisor Leaves
#define hvm_max_num_vstr 0x0
#define hvm_interface_id 0x1

typedef struct _noir_svm_cpuid_default
{
Expand Down Expand Up @@ -76,4 +77,6 @@ typedef void (fastcall *noir_svm_cpuid_exit_handler)
noir_svm_vcpu_p vcpu
);

noir_svm_cpuid_exit_handler** svm_cpuid_handlers=null;
#if defined(_svm_cpuid)
noir_svm_cpuid_exit_handler** svm_cpuid_handlers=null;
#endif
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