qflexpress.v on MAX1000 board (W74M64 Winbond flash) fails to read, always gives 0xCC or 0xEE

[ecm-pushbx]

Just today I got dualflexpress.v to work on my MAX1000 board (W74M64 Winbond flash of 8 MiB, written to using max1000_flashrom). I had to replace localparam by parameter to make Quartus happy. I also deleted the assign to o_dbg_trigger and o_debug, and commented out these two output wire definitions. I set CLKDIV to 1, RDDELAY to 0, and NDUMMY to 4. I uploaded the project with the successful tweaks to https://hg.pushbx.org/ecm/c86dled/rev/d787dedd0692 (It is a very simple design, using the 12 MHz clock, the user input button, and the 8 user LEDs to output the data read byte by byte. (Every 5th output is the same as the 4th.))

qflexpress.v doesn't work however. To make it compile I modified it in the following ways: parameter instead of localparam, DW=32 had a trailing comma it shouldn't have, and I tried CLKDIV = 1, RDDELAY = 0, NDUMMY = 0. This combination leads to reading always 0xEE (1110_1110b bytes). Other combinations lead to reading always 0xCC (1100_1100b bytes). Unlike my experience with dualflexpress, qflexpress never seems to return any of my data, not even partially / corrupted. I uploaded this design to https://hg.pushbx.org/ecm/c86qled/rev/6991862071ba (It is largely the same as the first one, just using qflexpress instead of dualflexpress.)

[ecm-pushbx]

I verified the dual design by manually noting down the first 224 bits read from the flash and comparing those with the image that I have written to the start of the flash. With the parameters as I listed them all this data is correct.

[ZipCPU]

The problem with qflexpress on the MAX1000 is that the MAX1000 doesn't wire up the D2 and D3 SPI pins. Therefore, there's no way to control the flash in QSPI mode on the MAX 1000.

For an example, using the MAX1000, you can examine this project. That particular design also has the updates/modifications required to the flash controller so that it will properly separate the two Wishbone interfaces so that AutoFPGA can allocate their address spaces separately.

Dan

[ecm-pushbx]

Oh, thanks for clearing this up. The "MAX1000 User Guide" by Trenz makes it seem (on page 15) in the graphic as if all the pins are connected to the FPGA. Though it does say "Single SPI interface is supported", not "dual" or "quad". Anyway, thanks for confirming it isn't my error.