Discussions

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  Issues with Accelwattch Quadratic Programming Optimization

  Moiralex asked Jul 1, 2024 in Q&A · Unanswered

  

  

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  ./ptx_ir.h:1053: int ptx_instruction::get_type2() const: Assertion `m_scalar_type.size() == 2' failed.

  eecspan asked May 28, 2024 in Q&A · Unanswered

  

  

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  Is there a way to run a specific PTX instead of a binary application?

  gFrancoCamilo asked Jun 27, 2024 in Q&A · Unanswered

  

  

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  How register is accessed for different operand sizes?

  DarkC343 asked Jun 16, 2024 in General · Answered

  

  

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  Impact of L1D Cache Size Change

  DarkC343 asked Dec 24, 2023 in Q&A · Unanswered

  

  

  

  

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  Problem with simulating executable linked with multiple objectives

  macto94 asked May 2, 2024 in Q&A · Answered

  

  

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  how to determine area for each component ?

  pratyushdhingra10 asked Jan 30, 2024 in Q&A · Unanswered

  

  

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  Questions about memory partitioning

  taejin-j asked Dec 5, 2023 in Q&A · Unanswered

  

  

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  Simulation acceleration

  taejin-j asked Nov 17, 2023 in Ideas · Unanswered

  

  

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  Deepbench benchmark crashes

  gkarfakis19 asked Nov 29, 2023 in Q&A · Unanswered

  

  

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  Constant power & tracing on a different generation

  jeffreyspaan asked Nov 15, 2023 in Q&A · Unanswered

  

  

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  Latencies scaling with CPU clock

  Moiralex asked Sep 21, 2023 in Q&A · Unanswered

  

  

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  Questions about the meaning of cache configuration parameters

  weijizhen asked Oct 27, 2023 in Q&A · Unanswered

  

  

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  Allocating multiple CPU cores for SASS-mode simulation

  jw12yoon asked Sep 12, 2023 in General · Answered

  

  

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  LDST Unit model

  rodhuega asked Jul 4, 2023 in General · Unanswered

  

  

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  plot-correlator not supporting csv files from nsight profiler

  QuangAnh-Hoang asked Jul 19, 2023 in Q&A · Unanswered

  

  

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  Model the latency and bandwidth between LLC slice and DRAM controller

  Yfeng-44 asked Jul 6, 2023 in Q&A · Answered

  

  

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  Few questions encountered using GPGPU-Sim

  jonnyhq asked Jun 8, 2023 in General · Unanswered

  

  

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  Is any of the cuda_runtime_api simulated/emulated/invoked in trace-mode with AccelSim

  Yfeng-44 asked Jun 12, 2023 in Q&A · Closed · Answered

  

  

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  about global access write

  weijizhen asked Jun 3, 2023 in General · Answered

  

  

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  about L2 cache issues.

  weijizhen asked May 25, 2023 in Q&A · Answered

  

  

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  Relation between "gpgpu-sim" and "accel-sim", and "gpgpu-sim_distribution" Git branches

  tschwinge asked May 17, 2023 in General · Answered

  

  

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  Does AccelSim's Trace-based execution execute host-side syscalls like file handling?

  nothingface0 asked Apr 21, 2023 in Q&A · Answered

  

  

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  warm up time

  beneslami asked Apr 20, 2023 in Q&A · Unanswered

  

  

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  Access to MLPerf Traces

  jw12yoon asked Apr 17, 2023 in General · Unanswered

  

  

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