arm64: dts: imx8mn: Enable CSI and ISI Nodes

The CSI in the imx8mn is the same as what is used in the imx8mm,
but it's routed to the ISI on the Nano.  The pgc_dispmix
controls a few clocks which are used by the ISI and CSI, but
the clocks need to be configured to operate at higher speeds
before they are enabled.

Reassign the clock parents and rates for IMX8MN_CLK_DISP_AXI
and IMX8MN_CLK_DISP_APB in the pgc_dispmix power-domain node,
add both the ISI and CSI nodes, and pointing them to each other.
Since the CSI capture is dependent on an attached camera, mark
both ISI and CSI as disabled by default.

Signed-off-by: Adam Ford <aford173@gmail.com>

arch/arm64/boot/dts/freescale/imx8mn.dtsi

@@ -679,6 +679,11 @@
 						reg = <IMX8MN_POWER_DOMAIN_DISPMIX>;
 						clocks = <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
 							 <&clk IMX8MN_CLK_DISP_APB_ROOT>;
+						assigned-clocks = <&clk IMX8MN_CLK_DISP_AXI>,
+								  <&clk IMX8MN_CLK_DISP_APB>;
+						assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_1000M>,
+									 <&clk IMX8MN_SYS_PLL1_800M>;
+						assigned-clock-rates = <500000000>, <200000000>;
 					};
 
 					pgc_mipi: power-domain@4 {
@@ -1038,6 +1043,25 @@
 			#size-cells = <1>;
 			ranges;
 
+			isi: isi@32e20000 {
+				compatible = "fsl,imx8mn-isi";
+				reg = <0x32e20000 0x100>;
+				interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
+					 <&clk IMX8MN_CLK_DISP_APB_ROOT>;
+				clock-names = "axi", "apb";
+				fsl,blk-ctrl = <&disp_blk_ctrl>;
+				power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_ISI>;
+				status = "disabled";
+
+				port {
+					isi_in: endpoint {
+						remote-endpoint = <&mipi_csi_out>;
+					};
+				};
+			};
+
 			disp_blk_ctrl: blk-ctrl@32e28000 {
 				compatible = "fsl,imx8mn-disp-blk-ctrl", "syscon";
 				reg = <0x32e28000 0x100>;
@@ -1066,6 +1090,42 @@
 				#power-domain-cells = <1>;
 			};
 
+			mipi_csi: mipi-csi@32e30000 {
+				compatible = "fsl,imx8mm-mipi-csi2";
+				reg = <0x32e30000 0x1000>;
+				interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+				assigned-clocks = <&clk IMX8MN_CLK_CAMERA_PIXEL>,
+						  <&clk IMX8MN_CLK_CSI1_PHY_REF>;
+				assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_1000M>,
+							  <&clk IMX8MN_SYS_PLL2_1000M>;
+				assigned-clock-rates = <333000000>;
+				clock-frequency = <333000000>;
+				clocks = <&clk IMX8MN_CLK_DISP_APB_ROOT>,
+					 <&clk IMX8MN_CLK_CAMERA_PIXEL>,
+					 <&clk IMX8MN_CLK_CSI1_PHY_REF>,
+					 <&clk IMX8MN_CLK_DISP_AXI_ROOT>;
+				clock-names = "pclk", "wrap", "phy", "axi";
+				power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_MIPI_CSI>;
+				status = "disabled";
+
+				ports {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					port@0 {
+						reg = <0>;
+					};
+
+					port@1 {
+						reg = <1>;
+
+						mipi_csi_out: endpoint {
+							remote-endpoint = <&isi_in>;
+						};
+					};
+				};
+			};
+
 			usbotg1: usb@32e40000 {
 				compatible = "fsl,imx8mn-usb", "fsl,imx7d-usb";
 				reg = <0x32e40000 0x200>;