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Hello👋,
I would like to ask: what does *N-*FIFO mean here? It means that each VC has a corresponding Buffer in NI? For example, if there are 4 VCs, there are 4 buffers in NI?
“Inside each NI, we have 2x FIFOs (WR/RD) for the outstanding AXI transactions (by default it is support up to 2 but can be configured as well) and *N-*FIFOs, one for each virtual channel”。
The text was updated successfully, but these errors were encountered:
Sir,I am confused about axi read vc buffer and VC buffer in router's input module. I would like to ask if this is correct: axi read vc buffer is in the axi interface module, and VC buffer is in the router's input module. Can you explain a little more about "axi read vc buffer"?
Hi @Elena32061
the N-FIFO means exactly that, through this para meter you can define the math expression that controls the number of buffers per VC, by default as you can read, if VC ID is <= 2 set the number of flit buffers to 1 then 2 and then 4, else set to 4. Basically you'd have this by default
Hello👋,
I would like to ask: what does *N-*FIFO mean here? It means that each VC has a corresponding Buffer in NI? For example, if there are 4 VCs, there are 4 buffers in NI?
“Inside each NI, we have 2x FIFOs (WR/RD) for the outstanding AXI transactions (by default it is support up to 2 but can be configured as well) and *N-*FIFOs, one for each virtual channel”。
The text was updated successfully, but these errors were encountered: