This project throws light on Designing of 1kx32-bit 6T SRAM memory using OpenRAM compiler.
- SRAM Specification
- Memory Size --> 1kx32-bit
- Technology PDK file --> 0.4um SCMOS Technology from MOSIS
- Operating voltage --> 5V
- Access time --> less than 30ns
Below flow chart gives a complete idea of project.
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NgSpice - Ngspice is a mixed-level/mixed-signal electronic circuit simulator. It is a successor of the latest stable release of Berkeley SPICE, version 3f.5, which was released in 1993. Ngspice is based on three open-source free-software packages: Spice3f5, Xspice and Cider1b1
- SPICE is the origin of all electronic circuit simulators, its successors are widely used in the electronics community.
- Xspice is an extension to Spice3 that provides additional C language code models to support analog behavioral modeling and co-simulation of digital components through a fast event-driven algorithm.
- Cider adds a numerical device simulator to ngspice. It couples the circuit-level simulator to the device simulator to provide enhanced simulation accuracy (at the expense of increased simulation time). Critical devices can be described with their technology parameters (numerical models), all others may use the original ngspice compact models.
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Magic - Magic is a venerable VLSI layout tool, written in the 1980's at Berkeley by John Ousterhout, now famous primarily for writing the scripting interpreter language Tcl. Due largely in part to its liberal Berkeley open-source license, magic has remained popular with universities and small companies. The open-source license has allowed VLSI engineers with a bent toward programming to implement clever ideas and help magic stay abreast of fabrication technology. However, it is the well thought-out core algorithms which lend to magic the greatest part of its popularity. Magic is widely cited as being the easiest tool to use for circuit layout, even for people who ultimately rely on commercial tools for their product design flow.
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OpenRAM - OpenRAM is an award winning open-source Python framework to create the layout, netlists, timing and power models, placement and routing models, and other views necessary to use SRAMs in ASIC design. OpenRAM supports integration in both commercial and open-source flows with both predictive and fabricable technologies. For more information on OpenRAM compiler please click here
├── sram [Git repo]
├── OpenRAM_sizing [Sizing of all devices taken from OpenRAM]
├──
├──
├── SRAM_sizing [SRAM Sizing has done mannualy]
├──
├──
- To Download EDA tools(NGSpice, Magic, Netgen) on your System clone the repo and follow the Github page. Clone the Repo 'git clone https://www.github.com/silicon-vlsi/project2020'
- Dr.Saroj Rout, Associate Professor, Silicon Institute of Technology
- Mr.Santunu sarangi, Assistant professor, Silicon Institute of Technology