Prevent stale data from being used to sync leaf clock

Signed-off-by: Alex Forencich <alex@alexforencich.com>
alexforencich · Dec 2, 2023 · 48147bb · 48147bb
1 parent 36cf9c9
commit 48147bb
Showing 1 changed file with 8 additions and 5 deletions.
diff --git a/rtl/ptp_td_leaf.v b/rtl/ptp_td_leaf.v
@@ -687,25 +687,28 @@ always @* begin
     // extract data
     if (dst_td_tvalid_reg) begin
         if (TS_TOD_EN) begin
-            if (dst_td_tid_reg == {4'd0, 4'd1}) begin
+            if (dst_td_tid_reg[3:0] == 4'd1) begin
                 dst_tod_ns_shadow_next[15:0] = dst_td_tdata_reg;
                 dst_tod_shadow_valid_next = 1'b0;
             end
-            if (dst_td_tid_reg == {4'd0, 4'd2}) begin
+            if (dst_td_tid_reg[3:0] == 4'd2) begin
                 dst_tod_ns_shadow_next[29:16] = dst_td_tdata_reg;
                 dst_tod_step_shadow_next = dst_tod_step_shadow_reg | dst_td_tdata_reg[15];
                 dst_tod_shadow_valid_next = 1'b0;
             end
-            if (dst_td_tid_reg == {4'd0, 4'd3}) begin
+            if (dst_td_tid_reg[3:0] == 4'd3) begin
                 dst_tod_s_shadow_next[15:0] = dst_td_tdata_reg;
                 dst_tod_shadow_valid_next = 1'b0;
             end
-            if (dst_td_tid_reg == {4'd0, 4'd4}) begin
+            if (dst_td_tid_reg[3:0] == 4'd4) begin
                 dst_tod_s_shadow_next[31:16] = dst_td_tdata_reg;
                 dst_tod_shadow_valid_next = 1'b0;
             end
-            if (dst_td_tid_reg == {4'd0, 4'd5}) begin
+            if (dst_td_tid_reg[3:0] == 4'd5) begin
                 dst_tod_s_shadow_next[47:32] = dst_td_tdata_reg;
+                dst_tod_shadow_valid_next = 1'b0;
+            end
+            if (dst_td_tid_reg == {4'd0, 4'd5}) begin
                 dst_tod_shadow_valid_next = 1'b1;
             end
             if (dst_td_tid_reg == {4'd1, 4'd1}) begin