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For old makefile flow
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-separate from another direrctory

Signed-off-by: y <hui1.teng.lim@intel.com>
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hui1teng authored and FelixWongSiewAn committed Mar 28, 2024
1 parent 6c92c61 commit 078a71d
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Showing 5 changed files with 47 additions and 23 deletions.
18 changes: 17 additions & 1 deletion sm_soc_devkit_ghrd/arguments_solver.tcl
Expand Up @@ -102,8 +102,10 @@
#
#****************************************************************************

source $proj_root/design_config.tcl

#puts "prjroot = ${prjroot} "
#source ${prjroot}/design_config.tcl
source ./design_config.tcl

proc check_then_accept { param } {
if {$param == device_family || device || qsys_name || project_name} {
Expand Down Expand Up @@ -168,11 +170,16 @@ if { ![ info exists board_pwrmgt ] } {

# Loading Board default configuration settings
<<<<<<< HEAD
<<<<<<< HEAD
set board_config_file "${prjroot}/board/board_${board}_config.tcl"
=======
set board_config_file $proj_root/board/board_${board}_config.tcl
puts "board path: $board_config_file"
>>>>>>> b561674... Fix TCL linkage to needed files, reposition Makefile.new as default, enable HPS_EMIF as default on.
=======
#set board_config_file "${prjroot}/board/board_${board}_config.tcl"
set board_config_file "./board/board_${board}_config.tcl"
>>>>>>> 31c9302... For old makefile flow
if {[file exist $board_config_file]} {
source $board_config_file
} else {
Expand Down Expand Up @@ -716,6 +723,7 @@ if {$f2s_address_width > 32 && $f2sdram_width > 0} {

<<<<<<< HEAD

<<<<<<< HEAD
source ${prjroot}/agilex_hps_pinmux_solver.tcl
source ${prjroot}/agilex_hps_parameter_solver.tcl
source ${prjroot}/agilex_hps_io48_delay_chain_solver.tcl
Expand All @@ -724,6 +732,14 @@ source $proj_root/hps_subsys/agilex_hps_pinmux_solver.tcl
source $proj_root/hps_subsys/agilex_hps_parameter_solver.tcl
source $proj_root/hps_subsys/agilex_hps_io48_delay_chain_solver.tcl
>>>>>>> b561674... Fix TCL linkage to needed files, reposition Makefile.new as default, enable HPS_EMIF as default on.
=======
#source ${prjroot}/agilex_hps_pinmux_solver.tcl
#source ${prjroot}/agilex_hps_parameter_solver.tcl
#source ${prjroot}/agilex_hps_io48_delay_chain_solver.tcl
source ./agilex_hps_pinmux_solver.tcl
source ./agilex_hps_parameter_solver.tcl
source ./agilex_hps_io48_delay_chain_solver.tcl
>>>>>>> 31c9302... For old makefile flow

# Was thinking to enable single TCL entry for flow of TOP RTL, qsys, quartus generation. Ideal still pending implementation
# exec quartus_sh --script=create_ghrd_quartus.tcl $top_quartus_arg
Expand Down
34 changes: 18 additions & 16 deletions sm_soc_devkit_ghrd/create_ghrd_qsys.tcl
Expand Up @@ -20,25 +20,27 @@
#
#****************************************************************************

puts "prjroot = ${prjroot} "
source ${prjroot}/arguments_solver.tcl
source ${prjroot}/utils.tcl
#puts "prjroot = ${prjroot} "
#source ${prjroot}/arguments_solver.tcl
#source ${prjroot}/utils.tcl
source ./arguments_solver.tcl
source ./utils.tcl

package require -exact qsys 19.1

#if {$fpga_peripheral_en == 1} {
#source ./peripheral_subsys/construct_subsys_peripheral.tcl
#reload_ip_catalog
#}
#
#if {$jtag_ocm_en == 1} {
#source ./jtag_subsys/construct_subsys_jtag_master.tcl
#reload_ip_catalog
#}
#if {$hps_en == 1} {
#source ./hps_subsys/construct_subsys_hps.tcl
#reload_ip_catalog
#}
if {$fpga_peripheral_en == 1} {
source ./peripheral_subsys/construct_subsys_peripheral.tcl
reload_ip_catalog
}

if {$jtag_ocm_en == 1} {
source ./jtag_subsys/construct_subsys_jtag_master.tcl
reload_ip_catalog
}
if {$hps_en == 1} {
source ./hps_subsys/construct_subsys_hps.tcl
reload_ip_catalog
}

create_system $qsys_name

Expand Down
9 changes: 6 additions & 3 deletions sm_soc_devkit_ghrd/create_ghrd_quartus.tcl
Expand Up @@ -15,10 +15,13 @@ foreach {key value} $quartus(args) {
set ${key} $value
}

puts "prjroot = ${prjroot} "
source ${prjroot}/arguments_solver.tcl
#puts "prjroot = ${prjroot} "
#source ${prjroot}/arguments_solver.tcl
source ./arguments_solver.tcl

#source ${prjroot}/board/board_${board}_pin_assignment_table.tcl
source ./board/board_${board}_pin_assignment_table.tcl

source ${prjroot}/board/board_${board}_pin_assignment_table.tcl
global pin_assignment_table

set hdlfiles "${top_name}.v,custom_ip/debounce/debounce.v"
Expand Down
5 changes: 3 additions & 2 deletions sm_soc_devkit_ghrd/create_ghrd_top.tcl
Expand Up @@ -24,8 +24,9 @@ foreach {key val} $::argv {
set ${key} $val
}

puts "prjroot = ${prjroot}"
source ${prjroot}/arguments_solver.tcl
#puts "prjroot = ${prjroot}"
#source ${prjroot}/arguments_solver.tcl
source ./arguments_solver.tcl

# construct parameters value used in / affect terp file
set param(top_name) $top_name
Expand Down
4 changes: 3 additions & 1 deletion sm_soc_devkit_ghrd/hps_subsys/agilex_hps_pinmux_solver.tcl
Expand Up @@ -135,7 +135,9 @@ for {set i 0} {$i < 12} {incr i} {
lappend io48_q4_assignment NONE
}

source $proj_root/hps_subsys/agilex_io48.tcl
#puts "prjroot = ${prjroot} "
#source ${prjroot}/agilex_io48.tcl
source ./agilex_io48.tcl

# Assigning individual IO48 peripherals
if {$hps_jtag_en == 1} {
Expand Down

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