enable BYTE_SWIZZLE for emif IP

Signed-off-by: Wong, Felix Siew An <felix.siew.an.wong@intel.com>
altera-opensource · Mar 28, 2024 · b174519 · b174519
1 parent 6ede94c
commit b174519
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/sm_soc_devkit_ghrd/board/board_DK-A5E065BB32AES1_emif_setting.tcl b/sm_soc_devkit_ghrd/board/board_DK-A5E065BB32AES1_emif_setting.tcl
@@ -73,7 +73,7 @@ if {$hps_emif_mem_part == "custom"} {
 								MEM_DEVICE_DQ_WIDTH                  16
 								MEM_COMPS_PER_RANK                   2
 								"
-        #set_component_param "emif_hps USER_EXTRA_PARAMETERS BYTE_SWIZZLE_CH0=0,X,X,X,1,2,3,X;PIN_SWIZZLE_CH0_DQS0=0,2,6,4,1,3,5,7;PIN_SWIZZLE_CH0_DQS1=12,15,8,11,14,10,13,9;PIN_SWIZZLE_CH0_DQS2=20,16,18,22,23,17,19,21;PIN_SWIZZLE_CH0_DQS3=26,30,28,24,25,27,31,29; "
+        set_component_param "emif_hps USER_EXTRA_PARAMETERS BYTE_SWIZZLE_CH0=0,X,X,X,1,2,3,X;PIN_SWIZZLE_CH0_DQS0=0,2,6,4,1,3,5,7;PIN_SWIZZLE_CH0_DQS1=12,15,8,11,14,10,13,9;PIN_SWIZZLE_CH0_DQS2=20,16,18,22,23,17,19,21;PIN_SWIZZLE_CH0_DQS3=26,30,28,24,25,27,31,29; "
     }
 
         # ------ Connections --------------------------------- #