dmaengine: dma-axi-dmac: Fix cyclic transfers descriptors length

In a cyclic transfer num_periods * period_len = buf_len.
So for each period must be allocated a descriptor having length
equal with one period and not the whole transfer buffer.

Signed-off-by: Bogdan Togorean <bogdan.togorean@analog.com>

Author: btogorean

drivers/dma/dma-axi-dmac.c

@@ -636,7 +636,7 @@ static struct dma_async_tx_descriptor *axi_dmac_prep_dma_cyclic(
 		return NULL;
 
 	axi_dmac_fill_linear_sg(chan, direction, buf_addr, num_periods,
-		buf_len, desc->sg);
+		period_len, desc->sg);
 
 	desc->cyclic = true;