iio: adc: ad9361: add ad9361_write_bist_reg() accessor to cache bist …

…reg value

The value of the BIST_CONFIG register should also be stored on the cached
bist_config after it is written to the physical register.
Otherwise there could be a discrepancy between the cached value and the
value in the register.

To do this, the ad9361_write_bist_reg() accessor has been added, which
always caches the last written value.

Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>

drivers/iio/adc/ad9361.c

@@ -1027,6 +1027,15 @@ int ad9361_bist_loopback(struct ad9361_rf_phy *phy, unsigned mode)
 }
 EXPORT_SYMBOL(ad9361_bist_loopback);
 
+int ad9361_write_bist_reg(struct ad9361_rf_phy *phy, u32 val)
+{
+	if (!phy)
+		return -EINVAL;
+	phy->bist_config = val;
+	return ad9361_spi_write(phy->spi, REG_BIST_CONFIG, val);
+}
+EXPORT_SYMBOL(ad9361_write_bist_reg);
+
 int ad9361_bist_prbs(struct ad9361_rf_phy *phy, enum ad9361_bist_mode mode)
 {
 	u32 reg = 0;
@@ -1045,9 +1054,7 @@ int ad9361_bist_prbs(struct ad9361_rf_phy *phy, enum ad9361_bist_mode mode)
 		break;
 	};
 
-	phy->bist_config = reg;
-
-	return ad9361_spi_write(phy->spi, REG_BIST_CONFIG, reg);
+	return ad9361_write_bist_reg(phy, reg);
 }
 EXPORT_SYMBOL(ad9361_bist_prbs);
 
@@ -1090,9 +1097,7 @@ static int ad9361_bist_tone(struct ad9361_rf_phy *phy,
 	reg1 = ((mask << 2) & reg_mask);
 	ad9361_spi_write(phy->spi, REG_BIST_AND_DATA_PORT_TEST_CONFIG, reg1);
 
-	phy->bist_config = reg;
-
-	return ad9361_spi_write(phy->spi, REG_BIST_CONFIG, reg);
+	return ad9361_write_bist_reg(phy, reg);
 }
 
 static int ad9361_check_cal_done(struct ad9361_rf_phy *phy, u32 reg,

drivers/iio/adc/ad9361.h

@@ -3416,6 +3416,7 @@ int ad9361_set_trx_clock_chain(struct ad9361_rf_phy *phy,
 int ad9361_dig_tune(struct ad9361_rf_phy *phy, unsigned long max_freq,
 			   enum dig_tune_flags flags);
 int ad9361_tx_mute(struct ad9361_rf_phy *phy, u32 state);
+int ad9361_write_bist_reg(struct ad9361_rf_phy *phy, u32 val);
 
 #endif
 

drivers/iio/adc/ad9361_conv.c

@@ -111,7 +111,7 @@ ssize_t ad9361_dig_interface_timing_analysis(struct ad9361_rf_phy *phy,
 	ad9361_ensm_force_state(phy, ENSM_STATE_ALERT);
 	ad9361_spi_write(phy->spi, REG_RX_CLOCK_DATA_DELAY, rx);
 	ad9361_bist_loopback(phy, loopback);
-	ad9361_spi_write(phy->spi, REG_BIST_CONFIG, bist);
+	ad9361_write_bist_reg(phy, bist);
 
 	if (!phy->pdata->fdd)
 		ad9361_set_ensm_mode(phy, phy->pdata->fdd, phy->pdata->ensm_pin_ctrl);
@@ -646,7 +646,7 @@ int ad9361_dig_tune(struct ad9361_rf_phy *phy, unsigned long max_freq,
 			ret = ad9361_dig_tune_tx(phy, max_freq, flags);
 
 		ad9361_bist_loopback(phy, loopback);
-		ad9361_spi_write(phy->spi, REG_BIST_CONFIG, bist);
+		ad9361_write_bist_reg(phy, bist);
 
 		if (ret == -EIO)
 			restore = true;