broadcom: Add VC5 NIR compiler.

This is a pretty straightforward fork of VC4's NIR compiler to VC5.  The
condition codes, registers, and I/O have all changed, making the backend
hard to share, though their heritage is still recognizable.

v2: Move to src/broadcom/compiler to match intel's layout, rename more
    "vc5" to "v3d", rename QIR to VIR ("V3D IR") to avoid symbol conflicts
    with vc4, use new v3d_debug header, add compiler init/free functions,
    do texture swizzling in NIR to allow optimization.

src/broadcom/Makefile.am

@@ -26,6 +26,8 @@ AM_CPPFLAGS = \
 	-I$(top_srcdir)/src \
 	-I$(top_srcdir)/src/broadcom/ \
 	-I$(top_srcdir)/src/broadcom/include \
+	-I$(top_srcdir)/src/gallium/auxiliary \
+	-I$(top_srcdir)/src/gallium/include \
 	$(VALGRIND_CFLAGS) \
 	$(DEFINES)
 

src/broadcom/Makefile.sources

@@ -16,6 +16,19 @@ BROADCOM_FILES = \
 	clif/clif_dump.c \
 	clif/clif_dump.h \
 	common/v3d_device_info.h \
+	compiler/nir_to_vir.c \
+	compiler/vir.c \
+	compiler/vir_dump.c \
+	compiler/vir_live_variables.c \
+	compiler/vir_lower_uniforms.c \
+	compiler/vir_opt_copy_propagate.c \
+	compiler/vir_opt_dead_code.c \
+	compiler/vir_register_allocate.c \
+	compiler/vir_to_qpu.c \
+	compiler/qpu_schedule.c \
+	compiler/qpu_validate.c \
+	compiler/v3d_compiler.h \
+	compiler/v3d_nir_lower_io.c \
 	qpu/qpu_disasm.c \
 	qpu/qpu_disasm.h \
 	qpu/qpu_instr.c \

src/broadcom/Makefile.vc5.am

@@ -13,6 +13,7 @@ check_PROGRAMS += \
 
 LDADD = \
 	libbroadcom.la \
+	$(top_builddir)/src/compiler/nir/libnir.la \
 	$(top_builddir)/src/util/libmesautil.la \
 	$(NULL)