Add the min. changes required to support the GF variant.

apache · May 4, 2023 · 9c3e97f · 9c3e97f
1 parent 357f721
commit 9c3e97f
Show file tree

Hide file tree

Showing 2 changed files with 34 additions and 1 deletion.
diff --git a/nimble/drivers/dialog_cmac/src/ble_phy.c b/nimble/drivers/dialog_cmac/src/ble_phy.c
@@ -302,6 +302,14 @@ static uint8_t g_ble_phy_tx_buf[BLE_PHY_MAX_PDU_LEN + 3];
 __attribute__((aligned(4)))
 static uint8_t g_ble_phy_rx_buf[BLE_PHY_MAX_PDU_LEN + 3];
 
+static inline void
+set_reg32_bits(uint32_t addr, uint32_t mask, uint32_t val)
+{
+    volatile uint32_t *reg = (volatile uint32_t *)addr;
+
+    *reg = (*reg & (~mask)) | (val << __builtin_ctz(mask));
+}
+
 static void ble_phy_irq_field_tx(void);
 static void ble_phy_irq_field_rx(void);
 static void ble_phy_irq_frame_tx(void);
@@ -1178,6 +1186,8 @@ ble_phy_init(void)
     g_ble_phy_data.phy_whitening = 1;
 #endif
 
+    set_reg32_bits(0x40000904, 0x0004, 1);
+
     ble_rf_init();
 
     /*

diff --git a/nimble/drivers/dialog_cmac/src/ble_rf.c b/nimble/drivers/dialog_cmac/src/ble_rf.c
@@ -30,6 +30,14 @@
 #define RF_CALIBRATION_1        (0x02)
 #define RF_CALIBRATION_2        (0x04)
 
+enum chip_variant {
+    CHIP_VARIANT_TSMC,
+    CHIP_VARIANT_GF,
+    CHIP_VARIANT_UNKNOWN
+};
+
+static int g_chip_variant;
+
 static const int8_t g_ble_rf_power_lvls[] = {
     -18, -12, -8, -6, -3, -2, -1, 0, 1, 2, 3, 4, 4, 5, 6
 };
@@ -114,6 +122,14 @@ set_reg16_mask(uint32_t addr, uint16_t mask, uint16_t val)
     *reg = (*reg & (~mask)) | (val & mask);
 }
 
+static inline int read_chip_variant(void)
+{
+    uint32_t chip_id1 = get_reg32_bits(0x50040200, 0xFF);
+
+    return ((chip_id1 == '2') ? CHIP_VARIANT_TSMC : 
+                                ((chip_id1 == '3') ? CHIP_VARIANT_GF : CHIP_VARIANT_UNKNOWN));
+}
+
 static void
 delay_us(uint32_t delay_us)
 {
@@ -234,6 +250,9 @@ ble_rf_synth_is_enabled(void)
 static void
 ble_rf_synth_apply_recommended_settings(void)
 {
+    if (g_chip_variant == CHIP_VARIANT_GF) {
+        set_reg32_mask(0x40022034, 0x00000018, 0x0215807B);
+    }
     set_reg32_mask(0x40022048, 0x0000000c, 0x000000d5);
     set_reg32_mask(0x40022050, 0x00000300, 0x00000300);
     set_reg16_mask(0x40022024, 0x0001, 0x0001);
@@ -337,7 +356,8 @@ ble_rf_calibration_1(void)
     set_reg32(0x40020000, 0x0f168820);
     set_reg32_bits(0x40022000, 0x00000001, 0);
     set_reg32_bits(0x4002101c, 0x00001e00, 0);
-    set_reg32_bits(0x4002001c, 0x0000003f, 47);
+    (g_chip_variant == CHIP_VARIANT_TSMC) ? set_reg32_bits(0x4002001c, 0x0000003f, 47) 
+                                          : set_reg32_bits(0x4002001c, 0x0000003f, 44);
     set_reg8(0x40020006, 1);
     set_reg32(0x40020020, 16);
     set_reg32_bits(0x4002003c, 0x00000800, 1);
@@ -539,6 +559,9 @@ ble_rf_init(void)
     static bool done = false;
     uint32_t val;
 
+    g_chip_variant = read_chip_variant();
+    assert(g_chip_variant != CHIP_VARIANT_UNKNOWN);
+
     ble_rf_disable();
 
     if (done) {