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arch/intel64: add g_ prefix to global data
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to follow NuttX coding standard

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
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@szafonimateusz-mi
szafonimateusz-mi committed Feb 23, 2024
1 parent d79f843 commit 40bd6d2
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Showing 6 changed files with 70 additions and 68 deletions.
24 changes: 12 additions & 12 deletions arch/x86_64/include/intel64/arch.h
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Original file line number Diff line number Diff line change
Expand Up @@ -357,25 +357,25 @@ begin_packed_struct struct ist_s

/* These are defined in intel64_head.S */

extern volatile uint8_t pdpt_low;
extern volatile uint8_t pd_low;
extern volatile uint8_t pt_low;
extern volatile uint8_t g_pdpt_low;
extern volatile uint8_t g_pd_low;
extern volatile uint8_t g_pt_low;

extern volatile uint8_t ist64_low;
extern volatile uint8_t gdt64_low;
extern volatile uint8_t gdt64_ist_low;
extern volatile uint8_t gdt64_low_end;
extern volatile uint8_t g_ist64_low;
extern volatile uint8_t g_gdt64_low;
extern volatile uint8_t g_gdt64_ist_low;
extern volatile uint8_t g_gdt64_low_end;

/* The actual address of the page table and gdt/ist after mapping the kernel
* in high address
*/

extern volatile uint64_t *pdpt;
extern volatile uint64_t *pd;
extern volatile uint64_t *pt;
extern volatile uint64_t *g_pdpt;
extern volatile uint64_t *g_pd;
extern volatile uint64_t *g_pt;

extern volatile struct ist_s *ist64;
extern volatile struct gdt_entry_s *gdt64;
extern volatile struct ist_s *g_ist64;
extern volatile struct gdt_entry_s *g_gdt64;

/****************************************************************************
* Public Function Prototypes
Expand Down
56 changes: 28 additions & 28 deletions arch/x86_64/src/intel64/intel64_head.S
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Original file line number Diff line number Diff line change
Expand Up @@ -51,20 +51,20 @@
.global __nxstart /* __nxstart is defined elsewhere */
.global nx_start /* nx_start is defined elsewhere */
.global g_idle_topstack /* The end of the idle stack, the start of the heap */
.global mb_info_struct
.global mb_magic
.global g_mb_info_struct
.global g_mb_magic

/* These are the page tables */
.global pdpt_low
.global pd_low
.global pt_low
.global g_pdpt_low
.global g_pd_low
.global g_pt_low

/* These are the GDT */
.global gdt64_low
.global gdt64_ist_low
.global gdt64_low_end
.global g_gdt64_low
.global g_gdt64_ist_low
.global g_gdt64_low_end

.global ist64_low
.global g_ist64_low

/****************************************************************************
* The multiboot2 header
Expand Down Expand Up @@ -162,13 +162,13 @@ start32_0:
__pmode_entry:
start32:
#ifdef CONFIG_ARCH_MULTIBOOT2
movl %ebx, mb_info_struct
movl %eax, mb_magic
movl %ebx, g_mb_info_struct
movl %eax, g_mb_magic
#endif

/* initialize rest of the page directory */
lea pd_low, %edi
lea pt_low, %esi
lea g_pd_low, %edi
lea g_pt_low, %esi

/* Popluate the lower 4GB as non-present
* for ecx = 0...512 * 4 : Loop and setup the page directories
Expand All @@ -195,7 +195,7 @@ ept_loop:
jnz epd_loop

/* Temporary populate the lower 128MB on 1:1 mapping */
lea pd_low, %edi
lea g_pd_low, %edi
mov $(X86_PAGE_GLOBAL | X86_PAGE_WR | X86_PAGE_PRESENT | X86_PAGE_HUGE), %eax

/* for ecx = 0...64 : Loop and setup 64x 2MB page directories */
Expand All @@ -212,7 +212,7 @@ pd_loop:
/* Populate the 1GB after 4GB boundary with Global mapping to kernel code.
* This creates maps the lower 1GB to 4GB~5GB
*/
lea pdpt_low, %edi
lea g_pdpt_low, %edi
mov $(X86_PAGE_GLOBAL | X86_PAGE_WR | X86_PAGE_PRESENT | X86_PAGE_HUGE), %eax

mov $0x4, %ecx
Expand Down Expand Up @@ -294,8 +294,8 @@ start64:

__revoke_low_memory:
/* Revoke the lower 128MB memory mapping */
lea pd_low, %edi
lea pt_low, %esi
lea g_pd_low, %edi
lea g_pt_low, %esi

/* for ecx = 0...64 : Loop and setup 64x 2MB page directories */
mov $64, %ecx
Expand Down Expand Up @@ -373,7 +373,7 @@ __enable_pcid:

/* IST for 64 bit long mode will be filled in up_irq */
.align(16)
ist64_low:
g_ist64_low:
.long 0
.quad 0xdeadbeefdeadbee0
.quad 0xdeadbeefdeadbee1
Expand All @@ -391,40 +391,40 @@ ist64_low:

/* GDT for 64 bit long mode */
.align(16)
gdt64_low:
g_gdt64_low:
.quad 0
.quad X86_GDT_CODE64_ENTRY
.quad X86_GDT_DATA_ENTRY
.quad X86_GDT_CODE32_ENTRY
.quad X86_GDT_DATA_ENTRY
.quad X86_GDT_CODE64_ENTRY
gdt64_ist_low:
g_gdt64_ist_low:
.quad 0x0 /* TSS segment low */
.quad 0x0 /* TSS segment high */
gdt64_low_end:
g_gdt64_low_end:

gdt64_ptr:
.short gdt64_low_end - gdt64_low - 1
.long gdt64_low
.short g_gdt64_low_end - g_gdt64_low - 1
.long g_gdt64_low

mxcsr_mem:
.long 0x00001f80

.align(PAGE_SIZE)
pml4:
.quad pdpt_low + X86_PAGE_PRESENT + X86_PAGE_WR
.quad g_pdpt_low + X86_PAGE_PRESENT + X86_PAGE_WR

.align(PAGE_SIZE)
pdpt_low:
.quad pd_low + X86_PAGE_PRESENT + X86_PAGE_WR
g_pdpt_low:
.quad g_pd_low + X86_PAGE_PRESENT + X86_PAGE_WR
.quad pd_2_low + X86_PAGE_PRESENT + X86_PAGE_WR
.quad pd_3_low + X86_PAGE_PRESENT + X86_PAGE_WR
.quad pd_4_low + X86_PAGE_PRESENT + X86_PAGE_WR

.fill X86_NUM_PAGE_ENTRY - 4, X86_PAGE_ENTRY_SIZE, 0

.align(PAGE_SIZE)
pd_low:
g_pd_low:
.fill X86_NUM_PAGE_ENTRY, X86_PAGE_ENTRY_SIZE, 0

.align(PAGE_SIZE)
Expand All @@ -440,7 +440,7 @@ pd_4_low:
.fill X86_NUM_PAGE_ENTRY, X86_PAGE_ENTRY_SIZE, 0

.align(PAGE_SIZE)
pt_low:
g_pt_low:
.fill X86_NUM_PAGE_ENTRY * X86_NUM_PAGE_ENTRY, X86_PAGE_ENTRY_SIZE, 0
.fill X86_NUM_PAGE_ENTRY * X86_NUM_PAGE_ENTRY, X86_PAGE_ENTRY_SIZE, 0
.fill X86_NUM_PAGE_ENTRY * X86_NUM_PAGE_ENTRY, X86_PAGE_ENTRY_SIZE, 0
Expand Down
24 changes: 12 additions & 12 deletions arch/x86_64/src/intel64/intel64_irq.c
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Original file line number Diff line number Diff line change
Expand Up @@ -72,7 +72,7 @@ uint8_t *g_isr_stack_end = g_isr_stack + IRQ_STACK_SIZE - 16;
* Private Data
****************************************************************************/

static struct idt_entry_s idt_entries[256];
static struct idt_entry_s g_idt_entries[256];

/****************************************************************************
* Private Functions
Expand Down Expand Up @@ -176,8 +176,8 @@ static void up_ist_init(void)

tss_l.limit_low = (((104 - 1) & 0xffff)); /* Segment limit = TSS size - 1 */

tss_l.base_low = ((uintptr_t)ist64 & 0x00ffffff); /* Low address 1 */
tss_l.base_high = (((uintptr_t)ist64 & 0xff000000) >> 24); /* Low address 2 */
tss_l.base_low = ((uintptr_t)g_ist64 & 0x00ffffff); /* Low address 1 */
tss_l.base_high = (((uintptr_t)g_ist64 & 0xff000000) >> 24); /* Low address 2 */

tss_l.P = 1;

Expand All @@ -186,17 +186,17 @@ static void up_ist_init(void)
tss_l.AC = 1;
tss_l.EX = 1;

tss_h = (((uintptr_t)ist64 >> 32) & 0xffffffff); /* High address */
tss_h = (((uintptr_t)g_ist64 >> 32) & 0xffffffff); /* High address */

gdt64[X86_GDT_ISTL_SEL_NUM] = tss_l;
g_gdt64[X86_GDT_ISTL_SEL_NUM] = tss_l;

/* memcpy used to handle type punning compiler warning */

memcpy((void *)&gdt64[X86_GDT_ISTH_SEL_NUM],
(void *)&tss_h, sizeof(gdt64[0]));
memcpy((void *)&g_gdt64[X86_GDT_ISTH_SEL_NUM],
(void *)&tss_h, sizeof(g_gdt64[0]));

ist64->IST1 = (uintptr_t)g_interrupt_stack_end;
ist64->IST2 = (uintptr_t)g_isr_stack_end;
g_ist64->IST1 = (uintptr_t)g_interrupt_stack_end;
g_ist64->IST2 = (uintptr_t)g_isr_stack_end;

asm volatile ("mov $0x30, %%ax; ltr %%ax":::"memory", "rax");
}
Expand Down Expand Up @@ -373,7 +373,7 @@ static void up_ioapic_init(void)
static void up_idtentry(unsigned int index, uint64_t base, uint16_t sel,
uint8_t flags, uint8_t ist)
{
struct idt_entry_s *entry = &idt_entries[index];
struct idt_entry_s *entry = &g_idt_entries[index];

entry->lobase = base & 0xffff;
entry->hibase = (base >> 16) & 0xffff;
Expand Down Expand Up @@ -404,7 +404,7 @@ struct idt_ptr_s idt_ptr;

static inline void up_idtinit(void)
{
memset(&idt_entries, 0, sizeof(struct idt_entry_s)*256);
memset(&g_idt_entries, 0, sizeof(struct idt_entry_s)*256);

/* Set each ISR/IRQ to the appropriate vector with selector=8 and with
* 32-bit interrupt gate. Interrupt gate (vs. trap gate) will leave
Expand Down Expand Up @@ -463,7 +463,7 @@ static inline void up_idtinit(void)

/* Then program the IDT */

setidt(&idt_entries, sizeof(struct idt_entry_s) * NR_IRQS - 1);
setidt(&g_idt_entries, sizeof(struct idt_entry_s) * NR_IRQS - 1);
}

/****************************************************************************
Expand Down
24 changes: 13 additions & 11 deletions arch/x86_64/src/intel64/intel64_lowsetup.c
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Original file line number Diff line number Diff line change
Expand Up @@ -44,12 +44,12 @@
* in high address.
*/

volatile uint64_t *pdpt;
volatile uint64_t *pd;
volatile uint64_t *pt;
volatile uint64_t *g_pdpt;
volatile uint64_t *g_pd;
volatile uint64_t *g_pt;

volatile struct ist_s *ist64;
volatile struct gdt_entry_s *gdt64;
volatile struct ist_s *g_ist64;
volatile struct gdt_entry_s *g_gdt64;

/****************************************************************************
* Private Functions
Expand Down Expand Up @@ -78,16 +78,18 @@ void intel64_lowsetup(void)

/* Setup pointers for accessing Page table and GDT in high address */

pdpt = (uint64_t *)((uintptr_t)&pdpt_low + X86_64_LOAD_OFFSET);
pd = (uint64_t *)((uintptr_t)&pd_low + X86_64_LOAD_OFFSET);
pt = (uint64_t *)((uintptr_t)&pt_low + X86_64_LOAD_OFFSET);
g_pdpt = (uint64_t *)((uintptr_t)&g_pdpt_low + X86_64_LOAD_OFFSET);
g_pd = (uint64_t *)((uintptr_t)&g_pd_low + X86_64_LOAD_OFFSET);
g_pt = (uint64_t *)((uintptr_t)&g_pt_low + X86_64_LOAD_OFFSET);

ist64 = (struct ist_s *)((uintptr_t)&ist64_low + X86_64_LOAD_OFFSET);
gdt64 = (struct gdt_entry_s *)((uintptr_t)&gdt64_low + X86_64_LOAD_OFFSET);
g_ist64 = (struct ist_s *)((uintptr_t)&g_ist64_low +
X86_64_LOAD_OFFSET);
g_gdt64 = (struct gdt_entry_s *)((uintptr_t)&g_gdt64_low +
X86_64_LOAD_OFFSET);

/* reload the GDTR with mapped high memory address */

setgdt((void *)gdt64, (uintptr_t)(&gdt64_low_end - &gdt64_low) - 1);
setgdt((void *)g_gdt64, (uintptr_t)(&g_gdt64_low_end - &g_gdt64_low) - 1);

/* Revoke the lower memory */

Expand Down
2 changes: 1 addition & 1 deletion arch/x86_64/src/intel64/intel64_map_region.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -68,7 +68,7 @@ int up_map_region(void *base, int size, int flags)
{
entry = (curr >> 12) & 0x7ffffff;

pt[entry] = curr | flags;
g_pt[entry] = curr | flags;
curr += PAGE_SIZE;
}

Expand Down
8 changes: 4 additions & 4 deletions arch/x86_64/src/intel64/intel64_start.c
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Original file line number Diff line number Diff line change
Expand Up @@ -38,8 +38,8 @@

/* This holds information passed by the multiboot2 bootloader */

uint32_t mb_magic __attribute__((section(".loader.bss")));
uint32_t mb_info_struct __attribute__((section(".loader.bss")));
uint32_t g_mb_magic __attribute__((section(".loader.bss")));
uint32_t g_mb_info_struct __attribute__((section(".loader.bss")));

/****************************************************************************
* Private Functions
Expand All @@ -60,12 +60,12 @@ static void x86_64_mb2_config(void)

/* Check that we were actually booted by a mulitboot2 bootloader */

if (mb_magic != MULTIBOOT2_BOOTLOADER_MAGIC)
if (g_mb_magic != MULTIBOOT2_BOOTLOADER_MAGIC)
{
return;
}

for (tag = (struct multiboot_tag *)(uintptr_t)(mb_info_struct + 8);
for (tag = (struct multiboot_tag *)(uintptr_t)(g_mb_info_struct + 8);
tag->type != MULTIBOOT_TAG_TYPE_END;
tag = (struct multiboot_tag *)((uint8_t *)tag +
((tag->size + 7) & ~7)))
Expand Down

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