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arch: move [enter|leave]_critical_section
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move [enter|leave]_critical_section to the same place for easy to understand
and call matching

Signed-off-by: hujun5 <hujun5@xiaomi.com>
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hujun260 authored and jerpelea committed Jul 27, 2023
1 parent 5c9c518 commit 68187b6
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Showing 18 changed files with 61 additions and 126 deletions.
14 changes: 0 additions & 14 deletions arch/arm/src/armv6-m/arm_schedulesigaction.c
Expand Up @@ -351,13 +351,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
#endif
}

/* Increment the IRQ lock count so that when the task is
* restarted, it will hold the IRQ spinlock.
*/

DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;

/* NOTE: If the task runs on another CPU(cpu), adjusting
* global IRQ controls will be done in the pause handler
* on the CPU(cpu) by taking a critical section.
Expand Down Expand Up @@ -403,13 +396,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
tcb->xcp.regs[REG_SP] = (uint32_t)tcb->xcp.regs +
XCPTCONTEXT_SIZE;

/* Increment the IRQ lock count so that when the task is restarted,
* it will hold the IRQ spinlock.
*/

DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;

/* Then set up to vector to the trampoline with interrupts
* disabled. We must already be in privileged thread mode to be
* here.
Expand Down
6 changes: 6 additions & 0 deletions arch/arm/src/armv6-m/arm_sigdeliver.c
Expand Up @@ -63,6 +63,8 @@ void arm_sigdeliver(void)
*/

int16_t saved_irqcount;

enter_critical_section();
#endif

board_autoled_on(LED_SIGNAL);
Expand Down Expand Up @@ -154,6 +156,10 @@ void arm_sigdeliver(void)

board_autoled_off(LED_SIGNAL);
#ifdef CONFIG_SMP
/* We need to keep the IRQ lock until task switching */

rtcb->irqcount++;
leave_critical_section((uint16_t)regs[REG_PRIMASK]);
rtcb->irqcount--;
#endif
arm_fullcontextrestore(regs);
Expand Down
14 changes: 0 additions & 14 deletions arch/arm/src/armv7-a/arm_schedulesigaction.c
Expand Up @@ -349,13 +349,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
#endif
}

/* Increment the IRQ lock count so that when the task is
* restarted, it will hold the IRQ spinlock.
*/

DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;

/* NOTE: If the task runs on another CPU(cpu), adjusting
* global IRQ controls will be done in the pause handler
* on the CPU(cpu) by taking a critical section.
Expand Down Expand Up @@ -401,13 +394,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
tcb->xcp.regs[REG_SP] = (uint32_t)tcb->xcp.regs +
XCPTCONTEXT_SIZE;

/* Increment the IRQ lock count so that when the task is restarted,
* it will hold the IRQ spinlock.
*/

DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;

/* Then set up to vector to the trampoline with interrupts
* disabled
*/
Expand Down
6 changes: 6 additions & 0 deletions arch/arm/src/armv7-a/arm_sigdeliver.c
Expand Up @@ -63,6 +63,8 @@ void arm_sigdeliver(void)
*/

int16_t saved_irqcount;

enter_critical_section();
#endif

board_autoled_on(LED_SIGNAL);
Expand Down Expand Up @@ -152,6 +154,10 @@ void arm_sigdeliver(void)

board_autoled_off(LED_SIGNAL);
#ifdef CONFIG_SMP
/* We need to keep the IRQ lock until task switching */

rtcb->irqcount++;
leave_critical_section(regs[REG_CPSR]);
rtcb->irqcount--;
#endif
arm_fullcontextrestore(regs);
Expand Down
14 changes: 0 additions & 14 deletions arch/arm/src/armv7-m/arm_schedulesigaction.c
Expand Up @@ -368,13 +368,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
#endif
}

/* Increment the IRQ lock count so that when the task is
* restarted, it will hold the IRQ spinlock.
*/

DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;

/* NOTE: If the task runs on another CPU(cpu), adjusting
* global IRQ controls will be done in the pause handler
* on the CPU(cpu) by taking a critical section.
Expand Down Expand Up @@ -420,13 +413,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
tcb->xcp.regs[REG_SP] = (uint32_t)tcb->xcp.regs +
XCPTCONTEXT_SIZE;

/* Increment the IRQ lock count so that when the task is restarted,
* it will hold the IRQ spinlock.
*/

DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;

/* Then set up to vector to the trampoline with interrupts
* disabled. We must already be in privileged thread mode to be
* here.
Expand Down
10 changes: 10 additions & 0 deletions arch/arm/src/armv7-m/arm_sigdeliver.c
Expand Up @@ -63,6 +63,8 @@ void arm_sigdeliver(void)
*/

int16_t saved_irqcount;

enter_critical_section();
#endif

board_autoled_on(LED_SIGNAL);
Expand Down Expand Up @@ -158,6 +160,14 @@ void arm_sigdeliver(void)

board_autoled_off(LED_SIGNAL);
#ifdef CONFIG_SMP
/* We need to keep the IRQ lock until task switching */

rtcb->irqcount++;
#ifdef CONFIG_ARMV7M_USEBASEPRI
leave_critical_section((uint8_t)regs[REG_BASEPRI]);
#else
leave_critical_section((uint16_t)regs[REG_PRIMASK]);
#endif
rtcb->irqcount--;
#endif
arm_fullcontextrestore(regs);
Expand Down
14 changes: 0 additions & 14 deletions arch/arm/src/armv7-r/arm_schedulesigaction.c
Expand Up @@ -352,13 +352,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
#endif
}

/* Increment the IRQ lock count so that when the task is
* restarted, it will hold the IRQ spinlock.
*/

DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;

/* NOTE: If the task runs on another CPU(cpu), adjusting
* global IRQ controls will be done in the pause handler
* on the CPU(cpu) by taking a critical section.
Expand Down Expand Up @@ -404,13 +397,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
tcb->xcp.regs[REG_SP] = (uint32_t)tcb->xcp.regs +
XCPTCONTEXT_SIZE;

/* Increment the IRQ lock count so that when the task is restarted,
* it will hold the IRQ spinlock.
*/

DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;

/* Then set up to vector to the trampoline with interrupts
* disabled
*/
Expand Down
6 changes: 6 additions & 0 deletions arch/arm/src/armv7-r/arm_sigdeliver.c
Expand Up @@ -63,6 +63,8 @@ void arm_sigdeliver(void)
*/

int16_t saved_irqcount;

enter_critical_section();
#endif

board_autoled_on(LED_SIGNAL);
Expand Down Expand Up @@ -149,6 +151,10 @@ void arm_sigdeliver(void)

board_autoled_off(LED_SIGNAL);
#ifdef CONFIG_SMP
/* We need to keep the IRQ lock until task switching */

rtcb->irqcount++;
leave_critical_section(regs[REG_CPSR]);
rtcb->irqcount--;
#endif
arm_fullcontextrestore(regs);
Expand Down
14 changes: 0 additions & 14 deletions arch/arm/src/armv8-m/arm_schedulesigaction.c
Expand Up @@ -368,13 +368,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
#endif
}

/* Increment the IRQ lock count so that when the task is
* restarted, it will hold the IRQ spinlock.
*/

DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;

/* In an SMP configuration, the interrupt disable logic also
* involves spinlocks that are configured per the TCB irqcount
* field. This is logically equivalent to
Expand Down Expand Up @@ -424,13 +417,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
tcb->xcp.regs[REG_SP] = (uint32_t)tcb->xcp.regs +
XCPTCONTEXT_SIZE;

/* Increment the IRQ lock count so that when the task is restarted,
* it will hold the IRQ spinlock.
*/

DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;

/* Then set up to vector to the trampoline with interrupts
* disabled. We must already be in privileged thread mode to be
* here.
Expand Down
10 changes: 10 additions & 0 deletions arch/arm/src/armv8-m/arm_sigdeliver.c
Expand Up @@ -63,6 +63,8 @@ void arm_sigdeliver(void)
*/

int16_t saved_irqcount;

enter_critical_section();
#endif

board_autoled_on(LED_SIGNAL);
Expand Down Expand Up @@ -158,6 +160,14 @@ void arm_sigdeliver(void)

board_autoled_off(LED_SIGNAL);
#ifdef CONFIG_SMP
/* We need to keep the IRQ lock until task switching */

rtcb->irqcount++;
#ifdef CONFIG_ARMV8M_USEBASEPRI
leave_critical_section((uint8_t)regs[REG_BASEPRI]);
#else
leave_critical_section((uint16_t)regs[REG_PRIMASK]);
#endif
rtcb->irqcount--;
#endif
arm_fullcontextrestore(regs);
Expand Down
14 changes: 0 additions & 14 deletions arch/arm64/src/common/arm64_schedulesigaction.c
Expand Up @@ -310,13 +310,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
CURRENT_REGS = tcb->xcp.regs;
}

/* Increment the IRQ lock count so that when the task is
* restarted, it will hold the IRQ spinlock.
*/

DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;

/* NOTE: If the task runs on another CPU(cpu), adjusting
* global IRQ controls will be done in the pause handler
* on the CPU(cpu) by taking a critical section.
Expand Down Expand Up @@ -353,13 +346,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
/* create signal process context */

arm64_init_signal_process(tcb, NULL);

/* Increment the IRQ lock count so that when the task is restarted,
* it will hold the IRQ spinlock.
*/

DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;
}
}
}
Expand Down
5 changes: 5 additions & 0 deletions arch/arm64/src/common/arm64_sigdeliver.c
Expand Up @@ -71,6 +71,7 @@ void arm64_sigdeliver(void)
struct regs_context *pctx =
(struct regs_context *)rtcb->xcp.saved_reg;
flags = (pctx->spsr & SPSR_DAIF_MASK);
enter_critical_section();
#endif

sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
Expand Down Expand Up @@ -163,6 +164,10 @@ void arm64_sigdeliver(void)
/* Then restore the correct state for this thread of execution. */

#ifdef CONFIG_SMP
/* We need to keep the IRQ lock until task switching */

rtcb->irqcount++;
leave_critical_section(flags);
rtcb->irqcount--;
#endif
arm64_fullcontextrestore(rtcb->xcp.regs);
Expand Down
14 changes: 0 additions & 14 deletions arch/risc-v/src/common/riscv_schedulesigaction.c
Expand Up @@ -359,13 +359,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
CURRENT_REGS[REG_INT_CTX] = int_ctx;
}

/* Increment the IRQ lock count so that when the task is
* restarted, it will hold the IRQ spinlock.
*/

DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;

/* NOTE: If the task runs on another CPU(cpu), adjusting
* global IRQ controls will be done in the pause handler
* on the CPU(cpu) by taking a critical section.
Expand Down Expand Up @@ -411,13 +404,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
tcb->xcp.regs[REG_SP] = (uintptr_t)tcb->xcp.regs +
XCPTCONTEXT_SIZE;

/* Increment the IRQ lock count so that when the task is restarted,
* it will hold the IRQ spinlock.
*/

DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;

/* Then set up to vector to the trampoline with interrupts
* disabled. We must already be in privileged thread mode to be
* here.
Expand Down
6 changes: 6 additions & 0 deletions arch/risc-v/src/common/riscv_sigdeliver.c
Expand Up @@ -64,6 +64,8 @@ void riscv_sigdeliver(void)
*/

int16_t saved_irqcount;

enter_critical_section();
#endif

board_autoled_on(LED_SIGNAL);
Expand Down Expand Up @@ -153,6 +155,10 @@ void riscv_sigdeliver(void)

board_autoled_off(LED_SIGNAL);
#ifdef CONFIG_SMP
/* We need to keep the IRQ lock until task switching */

rtcb->irqcount++;
leave_critical_section(regs[REG_INT_CTX]);
rtcb->irqcount--;
#endif
riscv_fullcontextrestore(regs);
Expand Down
14 changes: 0 additions & 14 deletions arch/sparc/src/sparc_v8/sparc_v8_schedulesigaction.c
Expand Up @@ -297,13 +297,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
sparc_savestate(tcb->xcp.regs);
}

/* Increment the IRQ lock count so that when the task is
* restarted, it will hold the IRQ spinlock.
*/

DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;

/* NOTE: If the task runs on another CPU(cpu), adjusting
* global IRQ controls will be done in the pause handler
* on the CPU(cpu) by taking a critical section.
Expand Down Expand Up @@ -336,13 +329,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
tcb->xcp.saved_npc = CURRENT_REGS[REG_NPC];
tcb->xcp.saved_status = CURRENT_REGS[REG_PSR];

/* Increment the IRQ lock count so that when the task is restarted,
* it will hold the IRQ spinlock.
*/

DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;

/* Then set up to vector to the trampoline with interrupts
* disabled. We must already be in privileged thread mode to be
* here.
Expand Down
6 changes: 6 additions & 0 deletions arch/sparc/src/sparc_v8/sparc_v8_sigdeliver.c
Expand Up @@ -72,6 +72,8 @@ void sparc_sigdeliver(void)
*/

int16_t saved_irqcount;

enter_critical_section();
#endif

board_autoled_on(LED_SIGNAL);
Expand Down Expand Up @@ -203,6 +205,10 @@ void sparc_sigdeliver(void)

board_autoled_off(LED_SIGNAL);
#ifdef CONFIG_SMP
/* We need to keep the IRQ lock until task switching */

rtcb->irqcount++;
leave_critical_section((regs[REG_PSR]));
rtcb->irqcount--;
#endif
sparc_fullcontextrestore(regs);
Expand Down

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