stm32_tickless.c: Fix formatting issues.

apache · Jul 18, 2020 · 79e98ea · 79e98ea
1 parent cccc1c4
commit 79e98ea
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Showing 2 changed files with 28 additions and 27 deletions.
diff --git a/arch/arm/src/stm32/stm32_tickless.c b/arch/arm/src/stm32/stm32_tickless.c
@@ -34,6 +34,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  *
  ****************************************************************************/
+
 /****************************************************************************
  * Tickless OS Support.
  *
@@ -56,6 +57,7 @@
  *     logic when the interval timer expires.
  *
  ****************************************************************************/
+
 /****************************************************************************
  * STM32 Timer Usage
  *
@@ -142,85 +144,85 @@ static struct stm32_tickless_s g_tickless;
  * Private Functions
  ****************************************************************************/
 
-/************************************************************************************
+/****************************************************************************
  * Name: stm32_getreg16
  *
  * Description:
  *   Get a 16-bit register value by offset
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 static inline uint16_t stm32_getreg16(uint8_t offset)
 {
   return getreg16(g_tickless.base + offset);
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: stm32_putreg16
  *
  * Description:
  *   Put a 16-bit register value by offset
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 static inline void stm32_putreg16(uint8_t offset, uint16_t value)
 {
   putreg16(value, g_tickless.base + offset);
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: stm32_modifyreg16
  *
  * Description:
  *   Modify a 16-bit register value by offset
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 static inline void stm32_modifyreg16(uint8_t offset, uint16_t clearbits,
                                      uint16_t setbits)
 {
   modifyreg16(g_tickless.base + offset, clearbits, setbits);
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: stm32_tickless_enableint
- ************************************************************************************/
+ ****************************************************************************/
 
 static inline void stm32_tickless_enableint(int channel)
 {
   stm32_modifyreg16(STM32_BTIM_DIER_OFFSET, 0, 1 << channel);
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: stm32_tickless_disableint
- ************************************************************************************/
+ ****************************************************************************/
 
 static inline void stm32_tickless_disableint(int channel)
 {
   stm32_modifyreg16(STM32_BTIM_DIER_OFFSET, 1 << channel, 0);
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: stm32_tickless_ackint
- ************************************************************************************/
+ ****************************************************************************/
 
 static inline void stm32_tickless_ackint(int channel)
 {
   stm32_putreg16(STM32_BTIM_SR_OFFSET, ~(1 << channel));
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: stm32_tickless_getint
- ************************************************************************************/
+ ****************************************************************************/
 
 static inline uint16_t stm32_tickless_getint(void)
 {
   return stm32_getreg16(STM32_BTIM_SR_OFFSET);
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: stm32_tickless_setchannel
- ************************************************************************************/
+ ****************************************************************************/
 
 static int stm32_tickless_setchannel(uint8_t channel)
 {
@@ -795,8 +797,8 @@ int up_timer_cancel(FAR struct timespec *ts)
       return OK;
     }
 
-  /* Yes.. Get the timer counter and period registers and disable the compare interrupt.
-   *
+  /* Yes.. Get the timer counter and period registers and disable the compare
+   * interrupt.
    */
 
   tmrinfo("Cancelling...\n");

diff --git a/arch/arm/src/stm32f7/stm32_tickless.c b/arch/arm/src/stm32f7/stm32_tickless.c
@@ -34,6 +34,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  *
  ****************************************************************************/
+
 /****************************************************************************
  * Tickless OS Support.
  *
@@ -223,7 +224,7 @@ static inline void stm32_tickless_ackint(int channel)
 
 /****************************************************************************
  * Name: stm32_tickless_getint
- ******************************************************************************/
+ ****************************************************************************/
 
 static inline uint16_t stm32_tickless_getint(void)
 {
@@ -1016,13 +1017,10 @@ int up_alarm_start(FAR const struct timespec *ts)
 
   g_tickless.pending = true;
 
-  /* We must protect for a race condition here with very small differences
-   * between the time of the alarm and the time now. We must ensure that the
-   * compare register is set, and interrupts are enabled BEFORE the rising edge
-   * of the clock when COUNT==COMPARE. Otherwise, we cannot be sure we are 
-   * going to get the interrupt. If we didn't catch this case, we wouldn't
-   * interrupt until a full loop of the clock.
-   * 
+  /* If we have already passed this time, there is a chance we didn't set the
+   * compare register in time and we've missed the interrupt. If we don't
+   * catch this case, we won't interrupt until a full loop of the clock.
+   *
    * Since we can't make assumptions about the clock speed and tick rate,
    * we simply keep adding an offset to the current time, until we can leave
    * certain that the interrupt is going to fire as soon as we leave the
@@ -1032,7 +1030,8 @@ int up_alarm_start(FAR const struct timespec *ts)
   while (tm <= stm32_get_counter())
     {
       tm = stm32_get_counter() + offset++;
-      STM32_TIM_SETCOMPARE(g_tickless.tch, CONFIG_STM32F7_TICKLESS_CHANNEL, tm);
+      STM32_TIM_SETCOMPARE(g_tickless.tch, CONFIG_STM32F7_TICKLESS_CHANNEL,
+                           tm);
     }
 
   leave_critical_section(flags);