ESP32-S3: Fix alignment of FPU registers in exception context #6917
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
xiaoxiang781216
approved these changes
Aug 25, 2022
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Summary
This PR intends to fix the alignment of FPU registers in exception context for the ESP32-S3 chip.
ESP32-S3 requires a minimum alignment of 16 bytes for the total save area.
Impact
Fixes #6914.
Testing
Successful execution of
ostestapplication onesp32s3-devkit:nshwithMM_UBSANenabled.