ci/cibuild.sh: upgrade esptool to 4.5.1

[anchao]

Summary

ci/cibuild.sh: upgrade esptool to 4.5.1

Impact

N/A

Testing

ci check

[anchao]

This PR will fix the ci break when building esp32c6-devkit/coremark:
#8997 (comment)

[lucasssvaz]

Nice find. This newest version of esptool is required by ESP32-C6 and H2. It was an oversight when adding support for these SoCs.
Its weird that it only began breaking yesterday 🤔

[lucasssvaz]

It appears that the error still occurs. Does the CI have any kind of cache that needs to be purged ?

====================================================================================
Configuration/Tool: esp32c6-devkit/coremark
------------------------------------------------------------------------------------
  Cleaning...
  Configuring...
  Building NuttX...
  % Total    % Received % Xferd  Average Speed   Time    Time     Time  Current
                                 Dload  Upload   Total   Spent    Left  Speed
  0     0    0     0    0     0      0      0 --:--:-- --:--:-- --:--:--     0
  0     0    0     0    0     0      0      0 --:--:-- --:--:-- --:--:--     0
100  475k    0  475k    0     0  2122k      0 --:--:-- --:--:-- --:--:-- 2122k
make: *** [tools/Unix.mk:527: nuttx] Error 2
make: Target 'all' not remade because of errors.
  Normalize esp32c6-devkit/coremark

[pkarashchenko]

I think we need to merge this PR. At least I can build the failing configuration with esptool 4.5

[pkarashchenko]

Seems like it didn't help :(

[anchao]

emm... strange, there should be a issue with the python tool used in esptool

[anchao]

Post build fail message:

MKIMAGE: ESP32-C6 binary
esptool.py --chip esp32c6 elf2image --flash_mode dio --flash_size "4MB" -o nuttx.bin nuttx
esptool.py v4.5.1
Creating esp32c6 image...
Merged 1 ELF section

A fatal error occurred: Segment loaded at 0x42010c08 lands in same 64KB flash mapping as segment loaded at 0x42010020. Can't generate binary. Suggest changing linker script or ELF to merge sections.
make: *** [tools/Unix.mk:527: nuttx] Error 2
make: Target 'all' not remade because of errors.

[pkarashchenko]

But I can build the same configuration on MAC without any issues. I'm still missing the gap here.

[lucasssvaz]

I can also build it locally without any issues on Linux.

Create version.h
Downloading: https://github.com/eembc/coremark/archive/main.zip
LN: platform/board to /home/lucassvaz/nuttxspace/apps/platform/dummy
  % Total    % Received % Xferd  Average Speed   Time    Time     Time  Current
                                 Dload  Upload   Total   Spent    Left  Speed
  0     0    0     0    0     0      0      0 --:--:-- --:--:-- --:--:--     0
100  475k  100  475k    0     0   569k      0 --:--:-- --:--:-- --:--:-- 1148k
Unpacking: main.zip -> coremark
patching file coremark/posix/core_portme.c
Register: coremark
CPP:  /home/lucassvaz/nuttxspace/nuttx/boards/risc-v/esp32c6/esp32c6-devkit/../common/scripts/esp32c6_rom.ld-> /home/lucCPP:  /home/lucassvaz/nuttxspace/nuttx/boards/risc-v/esp32c6/esp32c6-devkit/../common/scripts/flat_memory.ld-> /home/lucCPP:  /home/lucassvaz/nuttxspace/nuttx/boards/risc-v/esp32c6/esp32c6-devkit/../common/scripts/legacy_sections.ld-> /homeLD: nuttx
CP: nuttx.hex
MKIMAGE: ESP32-C6 binary
esptool.py --chip esp32c6 elf2image --flash_mode dio --flash_size "4MB" -o nuttx.bin nuttx
esptool.py v4.5.1
Creating esp32c6 image...
Merged 2 ELF sections
Successfully created esp32c6 image.
Generated: nuttx.bin (ESP32-C6 compatible)

[pkarashchenko]

The major difference in logs is Merged 2 ELF sections in success case vs Merged 1 ELF section in failure case

[pkarashchenko]

@anchao maybe CI has more cores and the issue is hidden in parallel build? Do we know what is ncpus value from options+="-j ${ncpus}" with CI build?

[lucasssvaz]

@anchao maybe CI has more cores and the issue is hidden in parallel build? Do we know what is ncpus value from options+="-j ${ncpus}" with CI build?

I also used parallel build on a 12 core/16 threads CPU and it worked fine. Idk if this is the problem. Maybe if ncpus is a considerable amount 🤔

[lucasssvaz]

@pkarashchenko According to the team that works on esptool:

This is a check for multiple ELF sections that are mapped in the same flash mapping region. This is usually a sign of a broken linker script. It means that two elf sections will overlap in the flash memory. Are the elf files produced locally and by the CI comparable? There will probably be some differences in the number of elf sections.