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[TIR] Fix plan buffer allocation location for loop carried dependencies #12757

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wrongtest-intellif
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@wrongtest-intellif wrongtest-intellif commented Sep 12, 2022

The pass PlanAndUpdateBufferAllocationLocation seems to have problem when the buffer accessed indices take a loop carried dependency. As an example,

@T.prim_func
def test(A: T.Buffer[(8, 8), "int32"], B: T.Buffer[(8, 8), "int32"]):
    C = T.alloc_buffer([8, 8], "int32")
    for i in range(8):
        for j in range(8):
            with T.block("b0"):
                vi = T.axis.spatial(8, i)
                vj = T.axis.spatial(8, j)
                C[vi, vj] = A[vi, vj] + vi
        for j in range(8):
            with T.block("b1"):
                vi = T.axis.opaque(8, i)
                vj = T.axis.spatial(8, j)
                B[vi, vj] = C[vi, vj] + T.if_then_else(vi > 0, C[vi - 1, vj], vi, dtype="int32")

The block b1's read access to intermediate buffer C on iteration i, depends b0 write of C on both i and i-1, thus we should not put allocation of C under loop i, which is the LCA position of current plan strategy.

To fix the issue we change the behavior of DetectBufferLCA to be aware of opaque block iters (loop carried dependency and other more complex behaviors are categorized as opaque in iter type annotation).

It enforce that every legal "ancestor" of buffer accesses should dominate all loops relates to accessed opaque block iters within buffer indices. Eg, since vi is opaque, buffer C indices use vi, the loop i must be under the planned allocation point of C.

As an interesting workload related to loop carried dependency, refer to https://discuss.tvm.apache.org/t/rfc-introducing-a-rolling-buffer-scheduling-primitive/9836, where the intermediate result of previous iteration is try best to get reused.

cc @Hzfengsy @junrushao1994

@wrongtest-intellif wrongtest-intellif force-pushed the fix_plan_buffer_allocation_for_loop_carried_dependency branch from dd537a8 to 56e7fe2 Compare September 14, 2022 15:35
@wrongtest-intellif wrongtest-intellif force-pushed the fix_plan_buffer_allocation_for_loop_carried_dependency branch from 56e7fe2 to dc143ad Compare September 18, 2022 08:43
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@wrongtest-intellif wrongtest-intellif merged commit a61c1ad into apache:main Sep 26, 2022
xinetzone pushed a commit to daobook/tvm that referenced this pull request Nov 25, 2022
…es (apache#12757)

* Fix plan buffer allocation location for loop carried dependencies

* fix testcase region annotation issue

* fix typo in ut
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2 participants