[Chisel][VTA] Fix multiple transfer issue in LoadUop module #4442
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vegaluisjose
approved these changes
Nov 28, 2019
|
Thank you @liangfu for the fix. Approved. |
tmoreau89
approved these changes
Nov 28, 2019
|
Thanks @liangfu @vegaluisjose ; the PR has been merged. |
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This PR intends to fix an issue in the LoadUop module.
Problem:
When the instruction request to transfer multiple uop that is larger than a single burst length, previous implement fail to update the write mask register
wmaskaccordingly.Solution:
Set write mask register
wmaskto"b11".Uwhen xrem is not0.U.@vegaluisjose @tmoreau89 Please review.