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------------------------------------------------------------------------ r321751 | arsenm | 2018-01-03 10:45:37 -0800 (Wed, 03 Jan 2018) | 25 lines StructurizeCFG: Fix broken backedge detection The work order was changed in r228186 from SCC order to RPO with an arbitrary sorting function. The sorting function attempted to move inner loop nodes earlier. This was was apparently relying on an assumption that every block in a given loop / the same loop depth would be seen before visiting another loop. In the broken testcase, a block outside of the loop was encountered before moving onto another block in the same loop. The testcase would then structurize such that one blocks unconditional successor could never be reached. Revert to plain RPO for the analysis phase. This fixes detecting edges as backedges that aren't really. The processing phase does use another visited set, and I'm unclear on whether the order there is as important. An arbitrary order doesn't work, and triggers some infinite loops. The reversed RPO list seems to work and is closer to the order that was used before, minus the arbitary custom sorting. A few of the changed tests now produce smaller code, and a few are slightly worse looking. ------------------------------------------------------------------------ ------------------------------------------------------------------------ r321806 | arsenm | 2018-01-04 09:23:24 -0800 (Thu, 04 Jan 2018) | 4 lines StructurizeCFG: xfail one of the testcases from r321751 It fails with -verify-region-info. This seems to be a issue with RegionInfo itself which existed before. ------------------------------------------------------------------------ ------------------------------------------------------------------------ r321878 | arsenm | 2018-01-05 09:51:36 -0800 (Fri, 05 Jan 2018) | 4 lines RegionInfo: Use report_fatal_error instead of llvm_unreachable Otherwise when using -verify-region-info in a release build the error won't be emitted. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@322686 91177308-0d34-0410-b5e6-96231b3b80d8
------------------------------------------------------------------------ r322003 | niravd | 2018-01-08 08:21:35 -0800 (Mon, 08 Jan 2018) | 11 lines [DAG] Teach BaseIndexOffset to correctly handle with indexed operations BaseIndexOffset address analysis incorrectly ignores offsets folded into indexed memory operations causing potential errors in alias analysis of pre-indexed operations. Reviewers: efriedma, RKSimon, hfinkel, jyknight Subscribers: hiraditya, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D41701 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@322693 91177308-0d34-0410-b5e6-96231b3b80d8
------------------------------------------------------------------------ r322724 | ctopper | 2018-01-17 10:46:01 -0800 (Wed, 17 Jan 2018) | 7 lines [X86] When legalizing (v64i1 select i8, v64i1, v64i1) make sure not to introduce bitcasts to i64 in 32-bit mode We legalize selects of masks with scalar conditions using a bitcast to an integer type. But if we are in 32-bit mode we can't convert v64i1 to i64. So instead split the v64i1 to v32i1 and concat it back together. Each half will then be legalized by bitcasting to i32 which is fine. The test case is a little indirect. If we have the v64i1 select in IR it will get legalized by legalize vector ops which has a run of type legalization after it. That type legalization run is able to fix this i64 bitcast. So in order to avoid that we need a build_vector of a splat which legalize vector ops will ignore. Legalize DAG will then turn that into a select via LowerBUILD_VECTORvXi1. And the select will get legalized. In this case there is no type legalizer run to cleanup the bitcast. This fixes pr35972. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@322835 91177308-0d34-0410-b5e6-96231b3b80d8
------------------------------------------------------------------------ r322644 | d0k | 2018-01-17 05:01:06 -0800 (Wed, 17 Jan 2018) | 7 lines [X86] Don't mutate shuffle arguments after early-out for AVX512 The match* functions have the annoying behavior of modifying its inputs. Save and restore the inputs, just in case the early out for AVX512 is hit. This is still not great and its only a matter of time this kind of bug happens again, but I couldn't come up with a better pattern without rewriting significant chunks of this code. Fixes PR35977. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@322840 91177308-0d34-0410-b5e6-96231b3b80d8
------------------------------------------------------------------------ r322053 | echristo | 2018-01-09 03:38:17 +0100 (Tue, 09 Jan 2018) | 1 line Remove unused function HvxSelector::zerous. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@322953 91177308-0d34-0410-b5e6-96231b3b80d8
This is a backport of https://reviews.llvm.org/D40876 which turns out to fix rdar://35116491 and rdar://33229629 Changes compared to D40876: - Removed mir file loading enhancements (not essential to fix the bug) - Only change useFPForScavengingIndex() behavior when oversized callframes are present to minimize codegen changes compared to previous version. - Removed the testcase as it needs fixes from https://reviews.llvm.org/D42006 to pass expensive checks enabled bots (that's an unrelated bugfix I did not want to backport that late in the process). Large callframes (calls with several hundreds or thousands or parameters) could lead to situations in which the emergency spillslot is out of range to be addressed relative to the stack pointer. This commit forces the use of a frame pointer in the presence of large callframes. This commit does several things: - Compute max callframe size at the end of instruction selection. - Let TargetFrameLowering::hasFP() return true if there exists a callframe > 255 bytes. - Place the emergency spillslot close to FP if a large callframe exists.
------------------------------------------------------------------------ r322875 | dim | 2018-01-18 19:39:13 +0100 (Thu, 18 Jan 2018) | 9 lines Add a -no-libcxxabi option to the test-release.sh script. On FreeBSD, it is currently not possible to build libcxxabi and link against it, so we have been building releases with -no-libs for quite some time. However, libcxx and libunwind should build without problems, so provide an option to skip just libcxxabi. ------------------------------------------------------------------------ Merging r322879: ------------------------------------------------------------------------ r322879 | dim | 2018-01-18 20:30:30 +0100 (Thu, 18 Jan 2018) | 2 lines Follow-up to rL322875 by initializing the do_libcxxabi variable properly. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@323038 91177308-0d34-0410-b5e6-96231b3b80d8
------------------------------------------------------------------------ r322878 | aemerson | 2018-01-18 20:21:27 +0100 (Thu, 18 Jan 2018) | 5 lines [AArch64][GlobalISel] Add isel support for global values in the large code model. Fixes PR35958. Differential Revision: https://reviews.llvm.org/D42175 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@323103 91177308-0d34-0410-b5e6-96231b3b80d8
------------------------------------------------------------------------ r322973 | mgorny | 2018-01-19 18:47:03 +0100 (Fri, 19 Jan 2018) | 7 lines [cmake] Include LLVM_LIBXML2_ENABLED in LLVMConfig.cmake, PR36006 Include the LLVM_LIBXML2_ENABLED cache variable in LLVMConfig.cmake in order to make it available for other LLVM packages to query. This is necessary to fix stand-alone testing of LLD. Differential Revision: https://reviews.llvm.org/D42252 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@323107 91177308-0d34-0410-b5e6-96231b3b80d8
------------------------------------------------------------------------ r322993 | kuhar | 2018-01-19 22:27:24 +0100 (Fri, 19 Jan 2018) | 16 lines [Dominators] Visit affected node candidates found at different root levels Summary: This patch attempts to fix the DomTree incremental insertion bug found here [[ https://bugs.llvm.org/show_bug.cgi?id=35969 | PR35969 ]] . When performing an insertion into a piece of unreachable CFG, we may find the same not at different levels. When this happens, the node can turn out to be affected when we find it starting from a node with a lower level in the tree. The level at which we start visitation affects if we consider a node affected or not. This patch tracks the lowest level at which each node was visited during insertion and allows it to be visited multiple times, if it can cause it to be considered affected. Reviewers: brzycki, davide, dberlin, grosser Reviewed By: brzycki Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42231 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@323110 91177308-0d34-0410-b5e6-96231b3b80d8
------------------------------------------------------------------------ r323034 | dmgreen | 2018-01-20 11:29:37 +0100 (Sat, 20 Jan 2018) | 9 lines [Dominators] Fix some edge cases for PostDomTree updating These fix some odd cfg cases where batch-updating the post dom tree fails. Usually around infinite loops and roots ending up being different. Differential Revision: https://reviews.llvm.org/D42247 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@323121 91177308-0d34-0410-b5e6-96231b3b80d8
LDC, the LLVM-based D compiler, is already ready for LLVM 6.0.0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@323186 91177308-0d34-0410-b5e6-96231b3b80d8
We were a bit too trusting about the offsets encoded in MachO compact unwind sections, so this passes every access through a bounds check just in case. It prevents a few segfaults on malformed object files, if one should ever come along. Mostly to silence fuzzers in the vague hope they might be able to produce something useful without the noise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323198 91177308-0d34-0410-b5e6-96231b3b80d8
Some nodes produce multiple values so when obtaining the type of an ISD::OR we need to make sure we ask for the correct one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323202 91177308-0d34-0410-b5e6-96231b3b80d8
Some nodes produce multiple values so when obtaining the type of an ISD::OR we need to make sure we ask for the correct one. Hopefully that's all of them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323205 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@323332 91177308-0d34-0410-b5e6-96231b3b80d8
------------------------------------------------------------------------ r322372 | nemanjai | 2018-01-12 15:58:41 +0100 (Fri, 12 Jan 2018) | 10 lines [PowerPC] Zero-extend the compare operand for ATOMIC_CMP_SWAP Part of the fix for https://bugs.llvm.org/show_bug.cgi?id=35812. This patch ensures that the compare operand for the atomic compare and swap is properly zero-extended to 32 bits if applicable. A follow-up commit will fix the extension for the SETCC node generated when expanding an ATOMIC_CMP_SWAP_WITH_SUCCESS. That will complete the bug fix. Differential Revision: https://reviews.llvm.org/D41856 ------------------------------------------------------------------------ ------------------------------------------------------------------------ r322767 | efriedma | 2018-01-17 23:04:36 +0100 (Wed, 17 Jan 2018) | 12 lines [LegalizeDAG] Fix ATOMIC_CMP_SWAP_WITH_SUCCESS legalization. The code wasn't zero-extending correctly, so the comparison could spuriously fail. Adds some AArch64 tests to cover this case. Inspired by D41791. Differential Revision: https://reviews.llvm.org/D41798 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@323334 91177308-0d34-0410-b5e6-96231b3b80d8
------------------------------------------------------------------------ r323190 | rksimon | 2018-01-23 12:39:06 +0100 (Tue, 23 Jan 2018) | 5 lines [X86][SSE] LowerBUILD_VECTORAsVariablePermute - fix PSHUFB source/index operand ordering As detailed in rL317463, PSHUFB (like most variable shuffle instructions) uses Op[0] for the source vector and Op[1] for the shuffle index vector, VPERMV works in reverse which is probably where the confusion comes from. Differential Revision: https://reviews.llvm.org/D42380 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@323335 91177308-0d34-0410-b5e6-96231b3b80d8
------------------------------------------------------------------------ r322900 | mstorsjo | 2018-01-18 22:21:48 +0100 (Thu, 18 Jan 2018) | 6 lines [test] Actually check the common parts in CodeGen/ARM/global-merge-external.ll. NFC. Previously, these parts weren't ever checked. The label patterns need to be extended to match successfully on macho. Differential Revision: https://reviews.llvm.org/D42126 ------------------------------------------------------------------------ ------------------------------------------------------------------------ r323307 | mstorsjo | 2018-01-24 07:40:04 +0100 (Wed, 24 Jan 2018) | 6 lines [GlobalMerge] Don't merge dllexport globals Merging such globals loses the dllexport attribute. Add a test to check that normal globals still are merged. Differential Revision: https://reviews.llvm.org/D42127 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@323337 91177308-0d34-0410-b5e6-96231b3b80d8
Remove FeatureSlowMisaligned128Store from cyclone flags. This flag causes splitting of 16 byte wide stores into 2 stored of 8 bytes. This was useful on older apple CPUs which were slow for 16byte stores that were not aligned on 16byte. As the compiler often cannot predict the actual alignment, the splitting was choosen. This has been a topic for a lot of debate as the splitting also decreases performance for some benchmarks. Measuring the effects on newer apple chips (rdar://35525421) shows that it harms more cases than it helps. So it is time to retire this workaround. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323289 91177308-0d34-0410-b5e6-96231b3b80d8
------------------------------------------------------------------------ r323369 | aemerson | 2018-01-24 20:59:29 +0100 (Wed, 24 Jan 2018) | 4 lines [GlobalISel] Don't fall back to FastISel. Apparently checking the pass structure isn't enough to ensure that we don't fall back to FastISel, as it's set up as part of the SelectionDAGISel. ------------------------------------------------------------------------ ------------------------------------------------------------------------ r323371 | aemerson | 2018-01-24 21:35:37 +0100 (Wed, 24 Jan 2018) | 12 lines [AArch64][GlobalISel] Fall back during AArch64 isel if we have a volatile load. The tablegen imported patterns for sext(load(a)) don't check for single uses of the load or delete the original after matching. As a result two loads are left in the generated code. This particular issue will be fixed by adding support for a G_SEXTLOAD opcode in future. There are however other potential issues around this that wouldn't be fixed by a G_SEXTLOAD, so until we have a proper solution we don't try to handle volatile loads at all in the AArch64 selector. Fixes/works around PR36018. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@323434 91177308-0d34-0410-b5e6-96231b3b80d8
This simply moves an existing utility to Utils for reuse. Split out of: https://reviews.llvm.org/D42551 Patch by Matt Davis! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323471 91177308-0d34-0410-b5e6-96231b3b80d8 (cherry picked from commit cdd614d)
This patch is an enhancement to propagate dbg.value information when
Phis are created on behalf of LCSSA. I noticed a case where a value
carried across a loop was reported as <optimized out>.
Specifically this case:
int bar(int x, int y) {
return x + y;
}
int foo(int size) {
int val = 0;
for (int i = 0; i < size; ++i) {
val = bar(val, i); // Both val and i are correct
}
return val; // <optimized out>
}
In the above case, after all of the interesting computation completes
our value is reported as "optimized out." This change will add a
dbg.value to correct this.
This patch also moves the dbg.value insertion routine from
LoopRotation.cpp into Local.cpp, so that we can share it in both places
(LoopRotation and LCSSA).
Patch by Matt Davis!
Differential Revision: https://reviews.llvm.org/D42551
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323472 91177308-0d34-0410-b5e6-96231b3b80d8
(cherry picked from commit b7162f2)
…tive to test case. r326290 fixed the assertion for decodeAddend, but not encodeAddend. The regression test failed to catch this because it was missing the subsections_via_symbols flag, so the desired relocation was not applied. This patch also fixes the formatting of the assertion from r326290. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326406 91177308-0d34-0410-b5e6-96231b3b80d8
------------------------------------------------------------------------ r326393 | ctopper | 2018-03-01 01:08:38 +0100 (Thu, 01 Mar 2018) | 5 lines [X86] Make sure we don't combine (fneg (fma X, Y, Z)) to a target specific node when there are no FMA instructions. This would cause a 'cannot select' error at isel when we should have emitted a lib call and an xor. Fixes PR36553. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@326423 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@326539 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@326549 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326620 91177308-0d34-0410-b5e6-96231b3b80d8 (cherry picked from commit 3ca5091)
In stage2 -O3 builds of llc, this results in a 0.3% increase in the number of variables with locations, and a 0.2% increase in the number of unique source variables overall. The size of the .debug_loc section of the llc dsym increases by 0.5%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326621 91177308-0d34-0410-b5e6-96231b3b80d8 (cherry picked from commit 40131a7)
In stage2 -O3 builds of llc, this results in small but measurable increases in the number of variables with locations, and in the number of unique source variables overall. (According to llvm-dwarfdump --statistics, there are 123 additional variables with locations, which is just a 0.006% improvement). The size of the .debug_loc section of the llc dsym increases by 0.004%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326629 91177308-0d34-0410-b5e6-96231b3b80d8 (cherry picked from commit a931186)
Summary:
This patch is an enhancement to propagate dbg.value information when Phis are created on behalf of LCSSA.
I noticed a case where a value carried across a loop was reported as <optimized out>.
Specifically this case:
```
int bar(int x, int y) {
return x + y;
}
int foo(int size) {
int val = 0;
for (int i = 0; i < size; ++i) {
val = bar(val, i); // Both val and i are correct
}
return val; // <optimized out>
}
```
In the above case, after all of the interesting computation completes our value
is reported as "optimized out." This change will add a dbg.value to correct this.
This patch also moves the dbg.value insertion routine from LoopRotation.cpp
into Local.cpp, so that we can share it in both places (LoopRotation and LCSSA).
Reviewers: mzolotukhin, aprantl, vsk, davide
Reviewed By: aprantl, vsk
Subscribers: dberlin, llvm-commits
Differential Revision: https://reviews.llvm.org/D42551
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325926 91177308-0d34-0410-b5e6-96231b3b80d8
(cherry picked from commit 799e367)
The redirection was confusing the windows build machine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325937 91177308-0d34-0410-b5e6-96231b3b80d8 (cherry picked from commit 6763369)
[GlobalOpt] Improve common case efficiency of static global initializ…
Summary: This is a workaround for pr36417 https://bugs.llvm.org/show_bug.cgi?id=36417 LiveDebugVariables will now verify that the DBG_VALUE instructions are sane (prior to register allocation) by asking LIS if a virtual register used in the DBG_VALUE is live (or dead def) in the slot index before the DBG_VALUE. If it isn't sane the DBG_VALUE is discarded. One pass that was identified as introducing non-sane DBG_VALUE instructtons, when analysing pr36417, was the DAG->DAG Instruction Selection. It sometimes inserts DBG_VALUE instructions referring to a virtual register that is defined later in the same basic block. So it is a use before def kind of problem. The DBG_VALUE is typically inserted in the beginning of a basic block when this happens. The problem can be seen in the test case test/DebugInfo/X86/dbg-value-inlined-parameter.ll Reviewers: aprantl, rnk, probinson Reviewed By: aprantl Subscribers: vsk, davide, alexcrichton, Ka-Ka, eraman, llvm-commits, JDevlieghere Differential Revision: https://reviews.llvm.org/D43956 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326769 91177308-0d34-0410-b5e6-96231b3b80d8
[DebugInfo] Discard invalid DBG_VALUE instructions in LiveDebugVariables
The MIR register format changed in the meanwhile but we didn't cherry pick. <rdar://problem/37670597>
[DebugInfo] Update tests to work on the swift-4.2 branch.
Instead of only printing the CU-relative offset in non-verbose mode, it makes more sense to only printed the resolved address. In verbose mode we still print both. Differential revision: https://reviews.llvm.org/D44148 rdar://33525475 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326903 91177308-0d34-0410-b5e6-96231b3b80d8 (cherry picked from commit 3cfa28f)
Allow us to embed the (Xcode) toolchain in the dSYM bundle's property list. Differential revision: https://reviews.llvm.org/D44151 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326994 91177308-0d34-0410-b5e6-96231b3b80d8 (cherry picked from commit e5edcce)
Patch by Ulrich Weigand! Pulling this in ahead of time to unblock a crash in the swift compiler. rdar://problem/38225089
The fast/linear DAG scheduler doesn't lower DBG_VALUEs except for function entry nodes. Patch by Joshua Cranmer! Differential Revision: https://reviews.llvm.org/D43028 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326631 91177308-0d34-0410-b5e6-96231b3b80d8 (cherry picked from commit 03749de)
This reverts commit 7ba1a4a.
<rdar://problem/38225089>
There is no point in lowering a dbg.declare describing an alloca that has volatile loads or stores as users, since the alloca cannot be elided. Lowering the dbg.declare will result in larger debug info that may also have worse coverage than just describing the alloca. rdar://problem/34496278 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327092 91177308-0d34-0410-b5e6-96231b3b80d8 (cherry picked from commit ac41ddd)
This was referenced Mar 9, 2018
…o stable 'c4ec2ab808fe4f1c01156095afea3f8e14ec15b8'
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