test: update IRGen test for aarch64 (AAPCS64)

[compnerd]

Update the syntax/codegen verification to account for differences with
the aarch64 target. This makes it pass on Linux-aarch64 (and should
also suffice for android-aarch64).

Replace this paragraph with a description of your changes and rationale. Provide links to external references/discussions if appropriate.

Resolves SR-NNNN.

[compnerd]

CC: @aschwaighofer @drodriguez

[compnerd]

@swift-ci please test and merge

[drodriguez]

IIRC it looks a lot like what the Android AArch64 target was emitting, but I don’t remember seeing the @PAGE bit (it did have the :lo12:). You can see the (partial) output I got a couple of weeks ago in #19481 (which I just closed in favor of this one). I will have to double check.

[drodriguez]

So it seems that both Android armv7 and aarch64 are not passing this test. I’m a little lost reading the assembly. This is what’s actually generated for Android aarch64:

$s4main10use_globalSiyF:
	.cfi_startproc
	sub	sp, sp, #64
	stp	x29, x30, [sp, #48]
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	adrp	x8, ($s4main6globalSivp)
	add	x8, x8, :lo12:($s4main6globalSivp)
	mov	x0, x8
	orr	x2, xzr, #0x20
	mov	x9, #0
	add	x10, sp, #24
	mov	x1, x10
	mov	x3, x9
	str	x8, [sp, #16]
	str	x10, [sp, #8]
	bl	swift_beginAccess
	ldr	x8, [sp, #16]
	ldr	x0, [x8]
	ldr	x9, [sp, #8]
	str	x0, [sp]
	mov	x0, x9
	bl	swift_endAccess
	ldr	x0, [sp]
	ldp	x29, x30, [sp, #48]
	add	sp, sp, #64
	ret

The only difference with the checks is that the line adrp x8, ($s4main6globalSivp) doesn’t match adrp [[REG1:x[0-9]+]], ($s4main6globalSivp@PAGE) because it is missing the @PAGE.

The Android ARMv7 assembly also fails to generate the expected output:

$s4main10use_globalSiyF:
	.fnstart
	.save	{r11, lr}
	push	{r11, lr}
	.setfp	r11, sp
	mov	r11, sp
	.pad	#16
	sub	sp, sp, #16
	ldr	r0, .LCPI1_1
.LPC1_1:
	add	r0, pc, r0
	add	r1, sp, #4
	movw	r2, #32
	movw	r3, #0
	bl	swift_beginAccess
	ldr	r0, .LCPI1_0
.LPC1_0:
	add	r0, pc, r0
	ldr	r0, [r0]
	add	r1, sp, #4
	str	r0, [sp]
	mov	r0, r1
	bl	swift_endAccess
	ldr	r0, [sp]
	mov	sp, r11
	pop	{r11, pc}
	.p2align	2
.LCPI1_0:
	.long	($s4main6globalSivp)-(.LPC1_0+8)
.LCPI1_1:
	.long	($s4main6globalSivp)-(.LPC1_1+8)

Instead of the expected movw [[R_ADR:r.*]], :lower16:(_$s4main6globalSivp-([[PIC_0:L.*]]+4)) and movt [[R_ADR]], :upper16:(_$s4main6globalSivp-([[PIC_0]]+4)), it seems that they are replaced by a combination of ldr and those .long.

In any case, it doesn’t look like the generated code is PIC, but I might be wrong.