A USB interface for an FPGA using a the Cypress FX3 device.
The VHDL testbenches are designed to work with vunit
python run.py to run the unit test
The system is currently being tested using the following:
Cypress Easy USB 3 Dev Kit CYUSB3KIT_003 and HSMC Adapter CYUSB3ACC_006
The FX3 is currently being loaded with SF_loopback.img from AN65974 using cyusb_linux_1.0.5 from Cypress.
Cyclone IV on the DE2-115 Dev Kit