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arm: Add ARM_OP_ADDR #771
arm: Add ARM_OP_ADDR #771
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please rebase |
ok to break compat for me unless it introduces regressions |
Can you please generate a new PR on libcapstone? |
Rebased to commit 3f46b83 with commit 2e6575f, and it is mirrored to libcapstone/libcapstone#3. |
@aquynh LGTM. |
Indeed it is. But I would not add The new operand mapping tables contain the type of each operand. (although they seem to be off. E.g. the address is signed. Maybe we need to fix the Here an example:
So I would propose to solve this problem by making typedef union {
uint32_t u32;
int32_t s32;
float f32;
...
} cast_result;
/// Cast the given @imm to its data type specified by LLVM.
/// It returns the cs_data_type the @imm was casted to.
/// The corresponding field in @result is set to the casted value.
cs_data_type map_cast_operand(uint64_t imm, cast_result *result); |
I'm closing this pull request. As @Rot127 says, the sign of the immediate should be determined by the instruction. However I suggest to leave |
@akihikodaki Would you mind open an issue about it? Just so we do not forget it and we can assign it to a milestone.
Will include this suggestion in #1949 |
Done: #2056 |
* Add auto-sync updater. * Update Capstone core with auto-sync changes. * Update ARM via auto-sync. * Make changes to arch modules which are introduced by auto-sync. * Update tests for ARM. * Fix build warnings for make * Remove meson.build * Print shift amount in decimal * Patch non LLVM register alias. * Change type of immediate operand to unsiged (due to: #771) * Replace all occurances of a register with its alias. * Fix printing of signed imms * Print rotate amount in decimal * CHange imm type to int64_t to match LLVM imm type. * Fix search for register names, by completing string first. * Print ModImm operands always in decimal * Use number format of previous capstone version. * Correct implicit writes and update_flags according to SBit. * Add missing test for RegImmShift * Reverse incorrect comparision. * Set shift information for move instructions. * Set mem access for all memory operands * Set subtracted flag if offset is negative. * Add flag for post-index memory operands. * Add detail op for BX_RET and MOVPCLR * Use instruction post_index operand. * Add VPOP and VPUSH as unique CS IDs. * Add shifting info for MOVsr. * Add TODOs. * Add in LLVM hardcoded operands to detail. * Move detail editing from InstPrinter to Mapping * Formatting * Add removed check. * Add writeback register and constraints to RFEI instructions. * Translate shift immediate * Print negative immediates * Remove duplicate invalid entry * Add CS groups to instructions * Fix write attriutes of stores. * Add missing names of added instructions * Fix LLVM bug * Add more post_index flags * http -> https * Make generated functions static * Remove tab prefix for alias instructions. * Set ValidateMCOperand to NULL. * Fix AddrMode3Operand operands * Allow getting system and banked register name via API * Add writeback to STC/LDC instructions. * Fix (hopefully) last case where disp is negative and subtracted = true * Remove accidentially introduced regressions
ATTENTION: THIS CHANGE BREAKS COMPATIBILITY
I found the assumption that address is stored as
ARM_OP_IMM
is actually already broken with #762. However, it is no longer possible to put it toimm
sinceaddress
can be greater thanINT32_MAX
. Doing so can result in anything, especially faults in arithmetic operations.Moreover, the old binding in Ocaml ignores bit 31 since the length of
int
in the language is 31 bits. It means addresses should be treated differently in the binding.Though the series of changes is a bug fix, breaking compatibility is inevitable.
See also #765.