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architech-boards · Mar 23, 2016 · 14a6d8f · 14a6d8f
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diff --git a/source/_static/changeme.jpg b/source/_static/changeme.jpg
diff --git a/source/_static/kds_debug.jpg b/source/_static/kds_debug.jpg
diff --git a/source/_static/kds_import_path.jpg b/source/_static/kds_import_path.jpg
diff --git a/source/_static/kds_project_located.jpg b/source/_static/kds_project_located.jpg
diff --git a/source/develop.rst b/source/develop.rst
@@ -25,11 +25,11 @@ Install Kinetis Design Studio
 
 First up, register at the NXP website `registration form <https://www.nxp.com/webapp/crcl.ccr_register.framework?ACTION_TYPE=registerpage>`_ then you can download the IDE from `this page <http://www.nxp.com/products/software-and-tools/run-time-software/kinetis-software-and-tools/ides-for-kinetis-mcus/kinetis-design-studio-integrated-development-environment-ide:KDS_IDE>`_, we used Kinetis Design Studio **3.0.0**.
 
-Therefore launch the downloaded file **Kinetis Design Studio installer for Microsoft Windows 3.0.0.exe** following all the default options. During the installation will be installed also SEGGER J-Link drivers.
+Next, launch the downloaded file **Kinetis Design Studio installer for Microsoft Windows 3.0.0.exe** following all the default options. During the installation it will be installed also SEGGER J-Link drivers.
 
-If you want modify the project using **processor expert** it is required to install also the package KSDK 1.3.0 because with the installation of the Kinetis Design Studio 3.0.0 is installed the KSDK 1.2.0 version and it is not compatible with the project.
+If you want to modify the project using **processor expert** it is required to install also the package KSDK 1.3.0 because with the installation of the Kinetis Design Studio 3.0.0 it is installed the KSDK 1.2.0 version and it is not compatible with the project.
 
-Launch KDS and select a directory for the workspace. In this folder will be imported our project. In this guide we used this path:
+Launch KDS and select a directory for the workspace. Our project will be imported in this folder. In this guide we used this path:
 
 .. image:: _static/kds_workspace.jpg
 
@@ -38,7 +38,7 @@ subsequently update the system to the version 3.1.0 clicking on **help->check fo
 .. image:: _static/kds_update1.jpg
 .. image:: _static/kds_update2.jpg
 
-then press **Accept** and **Finish**. Will be installed all the updates avaiable, if required accept some request during the installing. In the end restart the IDE.
+then press **Accept** and **Finish**. All the updates available will be installed, accept some request during the installing if it is required. At the end restart the IDE.
 
 Import Project
 **************
@@ -47,15 +47,15 @@ Go to **File->Import** and select **archive file**.
 
 .. image:: _static/kds_archive.jpg
 
-Browse to the zip file containing the project and select your workspace where put the source code.
+Browse to the zip file containing the project and select your workspace where to put the source code.
 
 .. image:: _static/kds_import_path.jpg
 
 The file will be unzipped. Now you have to import the source code going to **file->import** and selecting **Existing Projects into Workspace**
 
 .. image:: _static/kds_import_project.jpg
 
-Select where is locate from:
+Select where it is located:
 
 .. image:: _static/kds_project_located.jpg
 
@@ -64,19 +64,19 @@ Now you are ready to build and debug it.
 Build & Debug
 *************
 
-Go to **Project->Build All**, to compile the entire project. Therefore in order to debug it connect the J-Link to the connector **CN4**. The debug interface used is **SWD**. Then turn on the board switching the **SW1**.
+Go to **Project->Build All**, to compile the entire project. In order to debug it connect the J-Link to the connector **CN4**. The used debug interface is **SWD**. Then turn on the board switching the **SW1**.
 
 .. image:: _static/board_jlink.jpg
 
 Always on the KDS click on **Run->Debug Confiuration->GDB Segger J-Link Debug**.
 
 .. image:: _static/kds_debug.jpg
 
-Clicking on **Debug** button the debug will start entering on the first line code of the **main()** function. During the debug session the sleeping mode doesn't work.
+Clicking on **Debug** button the debug will start entering on the first line of code of the **main()** function. During the debug session the sleeping mode doesn't work.
 
 Processor Expert
 ****************
 
-KSDK 1.3.0 is a graphic tool used for simplify the peripherals initialization of the MKL26Z microprocessor. We suggest you to install the 1.3.0 version if you want to change the source code. This project is bare metal.
+KSDK 1.3.0 is a graphic tool used to simplify the peripherals initialization of the MKL26Z microprocessor. We suggest you to install the 1.3.0 version if you want to change the source code. This project is bare metal.
 
 
diff --git a/source/hw.rst b/source/hw.rst
@@ -21,7 +21,7 @@ The Light Sensor is read from the ADC converter pheriperal of the MKL26Z.
 
 The Accelerometer sensor is read from I2C interface.
 
-The microcontroller uses the deep sleep mode **VLPS**, it is waken up from LPTimer every 30 seconds or pin interrupt connected to the **S2** button.
+The microcontroller uses the deep sleep mode **VLPS**, it is waken up by LPTimer every 30 seconds or by pin interrupt connected to the **S2** button.
 
 The board
 *********
@@ -31,7 +31,7 @@ The board
 Commands used
 *************
 
-In order to send data in the Lora network the command is:
+The comand to send data in the Lora network is:
 
 - **AT$SS=18 AA BB CC**: used to send the frame *18AABBCC*
 

diff --git a/source/index.rst b/source/index.rst
@@ -1,77 +1,78 @@
-.. Sigfox_Silica documentation master file
-
-Welcome to Sensor Node Sigfox documentation!
-============================================
-
-:Version: 1.00A
-:Copyright: (C)2016 Avnet Memec Silica company
-:Date: 05 Feb 2016
-
-Sigfox’s Long Range Low Power End Node solution
------------------------------------------------
-
-.. image:: _static/logo_silica_nxp_fox.jpg
-
-.. image:: _static/board_on.jpg
-
-.. index:: index
-
-**INTRODUCTION**
-----------------
-
-Telecom Design’s **TD1207** devices are high performance, low current
-SIGFOXTM gateways. The combination of a powerful radio transceiver and a
-state-of-the-art ARM Cortex M3 baseband processor achieves extremely high
-performance while maintaining ultra-low active and standby current
-consumption. The **TD1207** device offers an outstanding RF sensitivity of –
-126 dBm while providing an exceptional output power of up to +14 dBm with
-unmatched TX efficiency. The **TD1207** device versatility provides the
-gateway function from a local Narrow Band ISM network to the long-distance
-Ultra Narrow Band SIGFOXTM network at no additional cost. The broad range
-of analog and digital interfaces available in the **TD1207** module allows any
-application to interconnect easily to the SIGFOXTM network. The LVTTL low-
-energy UART, along with the numerous GPIOs can control any kind of
-external sensors or activators. Featuring an AES encryption engine and a
-DMA controller, the powerful 32-bit ARM Cortex-M3 baseband processor can
-implement highly complex and secure protocols in an efficient environmental
-and very low consumption way.
-
-
-.. image:: _static/sigfox_network.jpg
-
-Features:
-
-- SIGFOX READY
-- Frequency range = ISM 868 MHz
-- Receive sensitivity =-126 dBm
-- Modulation: 
-    - (G)FSK, 4(G)FSK, GMSK,
-    - OOK
-- Max output power: +14 dBm
-- Low active radio power consumption: 
-    - 13/16 mA RX, 
-    - 37 mA TX @ +10 dBm
-- Power supply = 2.3 to 3.3 V
-
-
-
-Developement tools
-******************
-
-Firmware developed using:
-NXP Kinetis Design Studio. For installation and configuration of the project, follow instruction inside :ref:`develop`
-
-Document references
-*******************
-
-The board reference documentation is available on the `architech-board <http://architechboards.org>`_ website. 
-
-
-Contents:
-
-.. toctree::
-   :maxdepth: 2
-
-   develop
-   hw
-
+.. Sigfox_Silica documentation master file
+
+Welcome to Sensor Node Sigfox documentation!
+============================================
+
+:Version: 1.00B
+:Copyright: (C)2016 Avnet Memec Silica company
+:Date: 23 Mar 2016
+:Reference name: BAEVTSS003
+
+Sigfox’s Long Range Low Power End Node solution
+-----------------------------------------------
+
+.. image:: _static/logo_silica_nxp_fox.jpg
+
+.. image:: _static/board_on.jpg
+
+.. index:: index
+
+**INTRODUCTION**
+----------------
+
+Telecom Design’s **TD1207** devices are high performance, low current
+SIGFOXTM gateways. The combination of a powerful radio transceiver and a
+state-of-the-art ARM Cortex M3 baseband processor achieves extremely high
+performance while maintaining ultra-low active and standby current
+consumption. The **TD1207** device offers an outstanding RF sensitivity of –
+126 dBm while providing an exceptional output power of up to +14 dBm with
+unmatched TX efficiency. The **TD1207** device versatility provides the
+gateway function from a local Narrow Band ISM network to the long-distance
+Ultra Narrow Band SIGFOXTM network with no additional cost. The broad range
+of analog and digital interfaces available in the **TD1207** module allows any
+application to interconnect easily with the SIGFOXTM network. The LVTTL low-
+energy UART, along with the numerous GPIOs can control any kind of
+external sensors or activators. Featuring an AES encryption engine and a
+DMA controller, the powerful 32-bit ARM Cortex-M3 baseband processor can
+implement highly complex and secure protocols in an efficient environmental
+and very low consumption way.
+
+
+.. image:: _static/sigfox_network.jpg
+
+Features:
+
+- SIGFOX READY
+- Frequency range = ISM 868 MHz
+- Receive sensitivity =-126 dBm
+- Modulation: 
+    - (G)FSK, 4(G)FSK, GMSK,
+    - OOK
+- Max output power: +14 dBm
+- Low active radio power consumption: 
+    - 13/16 mA RX, 
+    - 37 mA TX @ +10 dBm
+- Power supply = 2.3 to 3.3 V
+
+
+
+Developement tools
+******************
+
+Firmware developed using:
+NXP Kinetis Design Studio. For installation and configuration of the project, follow instruction inside :ref:`develop`
+
+Document references
+*******************
+
+The board reference documentation is available on the `architech-board <http://architechboards.org>`_ website. 
+
+
+Contents:
+
+.. toctree::
+   :maxdepth: 2
+
+   develop
+   hw
+