Merge pull request #73 from arduino-libraries/dma_pool_api

misc: Update the library to use the API DMAPool.

src/AdvancedADC.cpp

@@ -30,7 +30,7 @@ struct adc_descr_t {
     IRQn_Type dma_irqn;
     TIM_HandleTypeDef tim;
     uint32_t  tim_trig;
-    DMABufferPool<Sample> *pool;
+    DMAPool<Sample> *pool;
     DMABuffer<Sample> *dmabuf[2];
 };
 
@@ -124,7 +124,7 @@ DMABuffer<Sample> &AdvancedADC::read() {
         while (!available()) {
             __WFI();
         }
-        return *descr->pool->dequeue();
+        return *descr->pool->alloc(DMA_BUFFER_READ);
     }
     return NULLBUF;
 }
@@ -200,14 +200,14 @@ int AdvancedADC::begin(uint32_t resolution, uint32_t sample_rate, size_t n_sampl
     }
 
     // Allocate DMA buffer pool.
-    descr->pool = new DMABufferPool<Sample>(n_samples, n_channels, n_buffers);
+    descr->pool = new DMAPool<Sample>(n_samples, n_channels, n_buffers);
     if (descr->pool == nullptr) {
         return 0;
     }
 
     // Allocate the two DMA buffers used for double buffering.
-    descr->dmabuf[0] = descr->pool->allocate();
-    descr->dmabuf[1] = descr->pool->allocate();
+    descr->dmabuf[0] = descr->pool->alloc(DMA_BUFFER_WRITE);
+    descr->dmabuf[1] = descr->pool->alloc(DMA_BUFFER_WRITE);
 
     // Init and config DMA.
     if (hal_dma_config(&descr->dma, descr->dma_irqn, DMA_PERIPH_TO_MEMORY) < 0) {
@@ -325,19 +325,16 @@ void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *adc) {
     if (descr->pool->writable()) {
         // Make sure any cached data is discarded.
         descr->dmabuf[ct]->invalidate();
-
         // Move current DMA buffer to ready queue.
-        descr->pool->enqueue(descr->dmabuf[ct]);
-
+        descr->dmabuf[ct]->release();
         // Allocate a new free buffer.
-        descr->dmabuf[ct] = descr->pool->allocate();
-
+        descr->dmabuf[ct] = descr->pool->alloc(DMA_BUFFER_WRITE);
         // Currently, all multi-channel buffers are interleaved.
         if (descr->dmabuf[ct]->channels() > 1) {
-            descr->dmabuf[ct]->setflags(DMA_BUFFER_INTRLVD);
+            descr->dmabuf[ct]->set_flags(DMA_BUFFER_INTRLVD);
         }
     } else {
-        descr->dmabuf[ct]->setflags(DMA_BUFFER_DISCONT);
+        descr->dmabuf[ct]->set_flags(DMA_BUFFER_DISCONT);
     }
 
     // Update the next DMA target pointer.

src/AdvancedADC.h

@@ -17,12 +17,10 @@
   Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
 */
 
-#include <array>
-#include "DMABuffer.h"
-#include "AdvancedAnalog.h"
+#ifndef __ADVANCED_ADC_H__
+#define __ADVANCED_ADC_H__
 
-#ifndef ARDUINO_ADVANCED_ADC_H_
-#define ARDUINO_ADVANCED_ADC_H_
+#include "AdvancedAnalog.h"
 
 struct adc_descr_t;
 
@@ -96,4 +94,4 @@ class AdvancedADCDual {
         int stop();
 };
 
-#endif /* ARDUINO_ADVANCED_ADC_H_ */
+#endif // __ADVANCED_ADC_H__

src/AdvancedAnalog.h

@@ -21,7 +21,7 @@
 #define __ADVANCED_ANALOG_H__
 
 #include "Arduino.h"
-#include "DMABuffer.h"
+#include "api/DMAPool.h"
 #include "pinDefinitions.h"
 
 enum {

src/AdvancedDAC.cpp

@@ -30,7 +30,7 @@ struct dac_descr_t {
     uint32_t tim_trig;
     uint32_t resolution;
     uint32_t dmaudr_flag;
-    DMABufferPool<Sample> *pool;
+    DMAPool<Sample> *pool;
     DMABuffer<Sample> *dmabuf[2];
 };
 
@@ -114,7 +114,7 @@ DMABuffer<Sample> &AdvancedDAC::dequeue() {
         while (!available()) {
             __WFI();
         }
-        return *descr->pool->allocate();
+        return *descr->pool->alloc(DMA_BUFFER_WRITE);
     }
     return NULLBUF;
 }
@@ -128,11 +128,11 @@ void AdvancedDAC::write(DMABuffer<Sample> &dmabuf) {
 
     // Make sure any cached data is flushed.
     dmabuf.flush();
-    descr->pool->enqueue(&dmabuf);
+    dmabuf.release();
 
     if (descr->dmabuf[0] == nullptr && (++buf_count % 3) == 0) {
-        descr->dmabuf[0] = descr->pool->dequeue();
-        descr->dmabuf[1] = descr->pool->dequeue();
+        descr->dmabuf[0] = descr->pool->alloc(DMA_BUFFER_READ);
+        descr->dmabuf[1] = descr->pool->alloc(DMA_BUFFER_READ);
 
         // Start DAC DMA.
         HAL_DAC_Start_DMA(descr->dac, descr->channel,
@@ -167,7 +167,7 @@ int AdvancedDAC::begin(uint32_t resolution, uint32_t frequency, size_t n_samples
     }
 
     // Allocate DMA buffer pool.
-    descr->pool = new DMABufferPool<Sample>(n_samples, n_channels, n_buffers);
+    descr->pool = new DMAPool<Sample>(n_samples, n_channels, n_buffers);
     if (descr->pool == nullptr) {
         descr = nullptr;
         return 0;
@@ -226,7 +226,7 @@ void DAC_DMAConvCplt(DMA_HandleTypeDef *dma, uint32_t channel) {
         // NOTE: CT bit is inverted, to get the DMA buffer that's Not currently in use.
         size_t ct = ! hal_dma_get_ct(dma);
         descr->dmabuf[ct]->release();
-        descr->dmabuf[ct] = descr->pool->dequeue();
+        descr->dmabuf[ct] = descr->pool->alloc(DMA_BUFFER_READ);
         hal_dma_update_memory(dma, descr->dmabuf[ct]->data());
     } else {
         dac_descr_deinit(descr, false);

src/AdvancedDAC.h

@@ -17,12 +17,10 @@
   Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
 */
 
-#include <vector>
-#include "DMABuffer.h"
-#include "AdvancedAnalog.h"
+#ifndef __ADVANCED_DAC_H__
+#define __ADVANCED_DAC_H__
 
-#ifndef ARDUINO_ADVANCED_DAC_H_
-#define ARDUINO_ADVANCED_DAC_H_
+#include "AdvancedAnalog.h"
 
 struct dac_descr_t;
 
@@ -52,4 +50,4 @@ class AdvancedDAC {
         int frequency(uint32_t const frequency);
 };
 
-#endif /* ARDUINO_ADVANCED_DAC_H_ */
+#endif // __ADVANCED_DAC_H__

src/AdvancedI2S.cpp

@@ -25,11 +25,11 @@ struct i2s_descr_t {
     I2S_HandleTypeDef i2s;
     DMA_HandleTypeDef dmatx;
     IRQn_Type dmatx_irqn;
-    DMABufferPool<Sample> *dmatx_pool;
+    DMAPool<Sample> *dmatx_pool;
     DMABuffer<Sample> *dmatx_buf[2];
     DMA_HandleTypeDef dmarx;
     IRQn_Type dmarx_irqn;
-    DMABufferPool<Sample> *dmarx_pool;
+    DMAPool<Sample> *dmarx_pool;
     DMABuffer<Sample> *dmarx_buf[2];
 };
 
@@ -154,16 +154,16 @@ static int i2s_start_dma_transfer(i2s_descr_t *descr, i2s_mode_t i2s_mode) {
 
     if (i2s_mode & AN_I2S_MODE_IN) {
         // Start I2S DMA.
-        descr->dmarx_buf[0] = descr->dmarx_pool->allocate();
-        descr->dmarx_buf[1] = descr->dmarx_pool->allocate();
+        descr->dmarx_buf[0] = descr->dmarx_pool->alloc(DMA_BUFFER_WRITE);
+        descr->dmarx_buf[1] = descr->dmarx_pool->alloc(DMA_BUFFER_WRITE);
         rx_buf = (uint16_t *) descr->dmarx_buf[0]->data();
         buf_size = descr->dmarx_buf[0]->size();
         HAL_NVIC_DisableIRQ(descr->dmarx_irqn);
     }
 
     if (i2s_mode & AN_I2S_MODE_OUT) {
-        descr->dmatx_buf[0] = descr->dmatx_pool->dequeue();
-        descr->dmatx_buf[1] = descr->dmatx_pool->dequeue();
+        descr->dmatx_buf[0] = descr->dmatx_pool->alloc(DMA_BUFFER_READ);
+        descr->dmatx_buf[1] = descr->dmatx_pool->alloc(DMA_BUFFER_READ);
         tx_buf = (uint16_t *) descr->dmatx_buf[0]->data();
         buf_size = descr->dmatx_buf[0]->size();
         HAL_NVIC_DisableIRQ(descr->dmatx_irqn);
@@ -183,7 +183,7 @@ static int i2s_start_dma_transfer(i2s_descr_t *descr, i2s_mode_t i2s_mode) {
             return 0;
         }
     }
-
+    HAL_I2S_DMAPause(&descr->i2s);
     // Re/enable DMA double buffer mode.
     if (i2s_mode & AN_I2S_MODE_IN) {
         hal_dma_enable_dbm(&descr->dmarx, descr->dmarx_buf[0]->data(), descr->dmarx_buf[1]->data());
@@ -194,6 +194,7 @@ static int i2s_start_dma_transfer(i2s_descr_t *descr, i2s_mode_t i2s_mode) {
         hal_dma_enable_dbm(&descr->dmatx, descr->dmatx_buf[0]->data(), descr->dmatx_buf[1]->data());
         HAL_NVIC_EnableIRQ(descr->dmatx_irqn);
     }
+    HAL_I2S_DMAResume(&descr->i2s);
     return 1;
 }
 
@@ -216,7 +217,7 @@ DMABuffer<Sample> &AdvancedI2S::read() {
         while (!descr->dmarx_pool->readable()) {
             __WFI();
         }
-        return *descr->dmarx_pool->dequeue();
+        return *descr->dmarx_pool->alloc(DMA_BUFFER_READ);
     }
     return NULLBUF;
 }
@@ -227,7 +228,7 @@ DMABuffer<Sample> &AdvancedI2S::dequeue() {
         while (!descr->dmatx_pool->writable()) {
             __WFI();
         }
-        return *descr->dmatx_pool->allocate();
+        return *descr->dmatx_pool->alloc(DMA_BUFFER_WRITE);
     }
     return NULLBUF;
 }
@@ -241,7 +242,7 @@ void AdvancedI2S::write(DMABuffer<Sample> &dmabuf) {
 
     // Make sure any cached data is flushed.
     dmabuf.flush();
-    descr->dmatx_pool->enqueue(&dmabuf);
+    dmabuf.release();
 
     if (descr->dmatx_buf[0] == nullptr && (++buf_count % 3) == 0) {
         i2s_start_dma_transfer(descr, i2s_mode);
@@ -285,7 +286,7 @@ int AdvancedI2S::begin(i2s_mode_t i2s_mode, uint32_t sample_rate, size_t n_sampl
 
     if (i2s_mode & AN_I2S_MODE_IN) {
         // Allocate DMA buffer pool.
-        descr->dmarx_pool = new DMABufferPool<Sample>(n_samples, 2, n_buffers);
+        descr->dmarx_pool = new DMAPool<Sample>(n_samples, 2, n_buffers);
         if (descr->dmarx_pool == nullptr) {
             descr = nullptr;
             return 0;
@@ -299,7 +300,7 @@ int AdvancedI2S::begin(i2s_mode_t i2s_mode, uint32_t sample_rate, size_t n_sampl
 
     if (i2s_mode & AN_I2S_MODE_OUT) {
         // Allocate DMA buffer pool.
-        descr->dmatx_pool = new DMABufferPool<Sample>(n_samples, 2, n_buffers);
+        descr->dmatx_pool = new DMAPool<Sample>(n_samples, 2, n_buffers);
         if (descr->dmatx_pool == nullptr) {
             descr = nullptr;
             return 0;
@@ -358,7 +359,7 @@ void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *i2s) {
     // the next DMA memory address target.
     if (descr->dmatx_pool->readable()) {
         descr->dmatx_buf[ct]->release();
-        descr->dmatx_buf[ct] = descr->dmatx_pool->dequeue();
+        descr->dmatx_buf[ct] = descr->dmatx_pool->alloc(DMA_BUFFER_READ);
         hal_dma_update_memory(&descr->dmatx, descr->dmatx_buf[ct]->data());
     } else {
         i2s_descr_deinit(descr, false);
@@ -384,15 +385,15 @@ void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *i2s) {
         // Make sure any cached data is discarded.
         descr->dmarx_buf[ct]->invalidate();
         // Move current DMA buffer to ready queue.
-        descr->dmarx_pool->enqueue(descr->dmarx_buf[ct]);
+        descr->dmarx_buf[ct]->release();
         // Allocate a new free buffer.
-        descr->dmarx_buf[ct] = descr->dmarx_pool->allocate();
+        descr->dmarx_buf[ct] = descr->dmarx_pool->alloc(DMA_BUFFER_WRITE);
         // Currently, all multi-channel buffers are interleaved.
         if (descr->dmarx_buf[ct]->channels() > 1) {
-            descr->dmarx_buf[ct]->setflags(DMA_BUFFER_INTRLVD);
+            descr->dmarx_buf[ct]->set_flags(DMA_BUFFER_INTRLVD);
         }
     } else {
-        descr->dmarx_buf[ct]->setflags(DMA_BUFFER_DISCONT);
+        descr->dmarx_buf[ct]->set_flags(DMA_BUFFER_DISCONT);
     }
 
     // Update the next DMA target pointer.

src/AdvancedI2S.h

@@ -16,11 +16,9 @@
   License along with this library; if not, write to the Free Software
   Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
 */
-#ifndef ARDUINO_ADVANCED_I2S_H
-#define ARDUINO_ADVANCED_I2S_H
+#ifndef __ADVANCED_I2S_H__
+#define __ADVANCED_I2S_H__
 
-#include <vector>
-#include "DMABuffer.h"
 #include "AdvancedAnalog.h"
 
 struct i2s_descr_t;
@@ -55,4 +53,4 @@ class AdvancedI2S {
         int stop();
 };
 
-#endif // ARDUINO_ADVANCED_I2S_H
+#endif // __ADVANCED_I2S_H__

src/Arduino_AdvancedAnalog.h

@@ -17,16 +17,12 @@
   Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
 */
 
-#ifndef ADVANCEDANALOGREDUX_ARDUINO_ADVANCEDANALOG_H
-#define ADVANCEDANALOGREDUX_ARDUINO_ADVANCEDANALOG_H
-
-/**************************************************************************************
- * INCLUDE
- **************************************************************************************/
+#ifndef __ARDUINO_ADVANCED_ANALOG_H__
+#define __ARDUINO_ADVANCED_ANALOG_H__
 
 #include "AdvancedADC.h"
 #include "AdvancedDAC.h"
 #include "AdvancedI2S.h"
 #include "WavReader.h"
 
-#endif /* ADVANCEDANALOGREDUX_ARDUINO_ADVANCEDANALOG_H */
+#endif // __ARDUINO_ADVANCED_ANALOG_H__