mega-cd fixes + a 32x tweak #205
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TascoDLX
commented
Sep 26, 2021
TascoDLX
commented
- Implement the actual shared access pattern on MCD's wordram in 1M mode. Fixes Lethal Enforcers II (CD).
- Do MCD H-INT vectoring. Fixes Microcosm, Silpheed, Wing Commander, and many more!
- Tighter 68k cpu sync for 32X emulation. Fixes Kolibri & FIFA Int'l Soccer '96 (32X) [ref: [32X] Sega 32X Compatibility List #180].
LukeUsher
approved these changes
Sep 27, 2021
LukeUsher
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Nov 14, 2023
c1cbaf09e x86: avoid clobbering ebx register during CPU detection (#217) 62c91605a cpuid on x86 clobbers memory 856fce15d loongarch: sljit_emit_atomic_load/store implementation using LoongArch V1.10 (#216) 44cee7aa5 allocator: add support for PowerPC in Apple (#214) e09319736 Improve Windows compatiblity 112fd4119 Add AVX detection 2713dda05 config: use standard interface to detect macOS version (#213) 029327875 Fix addc and subc on arm32 6a718f07d Improve simd lane mov on x86 292bf2e63 The bug is in the generation of a call relative instruction (because this is PIC code). Call relative of 0 will run the next instruction. So call relative is relative to the next instruction, not the current instruction. (#208) b6f010324 s390x: make sljit_generated_code_size() accurate (#209) e2c460881 Improve simd lane replicate on x86 73e84319c arm: small improvements for atomics with LSE (#210) 0436b57a6 Improve sljit_emit_simd_extend ff4c77263 mips: improve FPU detection also for MIPS64 (#205) 6d1376f84 Improve x86 code generation a443763e4 build: clear warnings with gcc12 and improve Makefile (#191) d78063a88 ppc: correctly implement SLJIT_REV in 64bit little endian (#193) git-subtree-dir: thirdparty/sljit git-subtree-split: c1cbaf09e995d4d2ab87a85b2ed6a27f4e123754
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