cpu-simple: Do not wait for a cache response for prefetches

Currently, a prefetch instruction will result in an infinite sleep where
the CPU never wakes back up as it is expecting a dcache response even
though this will not be delivered for prefetches. Work around this by
overriding the _status field for prefetches in completeIfetch().

This allows my test workload from gem5#1139
to continue running beyond strlen() when using TimingSimpleCpu (but not
other CPUs such as MinorCPU).

Partially fixes: gem5#1139

Change-Id: Ic44bdb87f4099b11a7f9c6c99768a12fbef5842e

src/cpu/simple/timing.cc

@@ -855,10 +855,18 @@ TimingSimpleCPU::completeIfetch(PacketPtr pkt)
     if (curStaticInst && curStaticInst->isMemRef()) {
         // load or store: just send to dcache
         Fault fault = curStaticInst->initiateAcc(&t_info, traceData);
+        panic_if(fault != NoFault && curStaticInst->isPrefetch(),
+                 "Prefetches should not trigger faults");
 
         // If we're not running now the instruction will complete in a dcache
         // response callback or the instruction faulted and has started an
         // ifetch
+        // Note: we don't get a dcache response for prefetches, so manually
+        // set the CPU status back to running. This is probably not the
+        // cleanest solution but allows progress beyond prefetch instructions.
+        if (curStaticInst->isPrefetch()) {
+          _status = BaseSimpleCPU::Running;
+        }
         if (_status == BaseSimpleCPU::Running) {
             if (fault != NoFault && traceData) {
                 traceFault();