Feat(eos_designs): Single uplink to mlag pair, mlag_on_orphan_port_channel_downlink #3495
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Reviewed configs and they seem correct. The change to an existing test case is also correct, but that shows that existing deployments may be impacted by this. I have tested in lab, and single connected port-channels with mlag configured still function. The mlag command will not do anything and can be removed without impact. But since this is changing existing config - causing concern, I think we need to put this behavior behind a knob single_uplink_switch_mlag: <bool; default=True> which we can then flip to default False in AVD 5.0
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..._collections/arista/avd/roles/eos_designs/python_modules/underlay/port_channel_interfaces.py
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ansible_collections/arista/avd/roles/eos_designs/docs/tables/fabric-settings.md
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| mlag_on_orphan_port_channel_downlink: false |
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is the behavior withtrue being tested anywhere? (I mean explicitly tested to check the difference between true and false)
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I don't think so
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True is the default and before adding this we saw a change on another device, where our changes here removed mlag. After adding this knob, we no longer change that other leaf. So effectively yes, we are testing it there. I need to check commit history to figure out where it was.
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This was the other switch being changed before we added the toggle for this behavioral change.
...arista/avd/molecule/eos_designs_unit_tests/inventory/group_vars/SINGLE_LINK_TO_MLAG_PAIR.yml
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Approved. I will resolve the conflict once we have merged #3584 |
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Change Summary
Fixes an existing bug in designs where there is a standalone switch with just a single link to just one switch of an mlag pair where AVD will unnecessarily make the port-channel created on the mlag pair towards the standalone switch an MLAG port-channel which prevents LACP on the link between the standalone switch and the single switch of the mlag pair from forming.
Related Issue(s)
Fixes #3459
Component(s) name
arista.avd.eos_designsProposed changes
Add the logic to make a fabric port-channel an MLAG port-channel only if the switch where we are configuring the port-channel or its mlag peer connect to a single logical switch.
How to test
Added a molecule test with a topology that triggers this condition
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