Verilog 3 bit truth table

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• Modules
  • AND
  • OR
  • XOR
  • NOT
  • NAND
  • NOR
  • XNOR
  • F1, F2(custom function)

Using a Hardware Design Language, write a program that create a truth table, that shows a row (min term) number, the 4 input bits N,G,S, and the results of the following nine equations as follow:

• Create a module based on the equation (N'G')'(N'S')'(G'S')'
• Create a module based on the equation (NG+NS+GS)
• Create a module to show a three-bit AND gate.
• Create a module to show a three -bit OR gate.
• Create a module to show a three -bit XOR gate.
• Create a module to show a three -bit NOT gate.
• Create a module to show a three -bit NAND gate.
• Create a module to show a three -bit NOR gate.
• Create a module to show a three -bit XNOR gate.