Merge pull request #1 from TalHal/master

Adding CODE memory type and changing the API to: CODE,RW_DATA,DEVICE

examples/base-fvp-all-types.txt

@@ -0,0 +1,9 @@
+0x040000000, 180K, CODE, CODE
+0x040030000, 256K, RW_DATA, RW_DATA
+0x004000000, 32M, RW_DATA, FLASH
+0x06B220000, 4K, DEVICE, UART0
+0x08000000, 64K, DEVICE, GIC_DIST
+0x08010000, 64K, DEVICE, GIC_CPU
+0x08080000, 128K, DEVICE, GIC_ITS
+0x080A0000, 15M, DEVICE, GIC_REDIST
+0x4010000000, 256M, DEVICE, PCIE

examples/base-fvp-full-non-secure.txt

@@ -14,10 +14,10 @@
 0x02A800000,  64K, DEVICE, Generic Timer REFCLK CNTRead
 0x02A830000,  64K, DEVICE, Generic Timer AP_REFCLK CNTBase1
 0x02C000000,   8K, DEVICE, GICC
-0x02E000000,  64K, NORMAL, Non-Trusted SRAM
+0x02E000000,  64K, RW_DATA, Non-Trusted SRAM
 0x02F000000,  64K, DEVICE, GICv3 GICD
 0x02F020000, 128K, DEVICE, GICv3 ITS
 0x02F100000,   1M, DEVICE, GICv3 GICR
 0x07FF60000,  64K, DEVICE, PL370 HDLCD Controller
-0x080000000,   2G, NORMAL, Non-Trusted DRAM
-0x880000000,   6G, NORMAL, Non-Trusted DRAM
+0x080000000,   2G, RW_DATA, Non-Trusted DRAM
+0x880000000,   6G, RW_DATA, Non-Trusted DRAM

examples/base-fvp-full-secure.txt

@@ -19,10 +19,10 @@
 0x02A830000,  64K, DEVICE, Generic Timer AP_REFCLK CNTBase1
 0x02C000000,   8K, DEVICE, GICC
 0x02C090000,  64K, DEVICE, CCI-400
-0x02E000000,  64K, NORMAL, Non-Trusted SRAM
+0x02E000000,  64K, RW_DATA, Non-Trusted SRAM
 0x02F000000,  64K, DEVICE, GICv3 GICD
 0x02F020000, 128K, DEVICE, GICv3 ITS
 0x02F100000,   1M, DEVICE, GICv3 GICR
 0x07FF60000,  64K, DEVICE, PL370 HDLCD Controller
-0x080000000,   2G, NORMAL, Non-Trusted DRAM
-0x880000000,   6G, NORMAL, Non-Trusted DRAM
+0x080000000,   2G, RW_DATA, Non-Trusted DRAM
+0x880000000,   6G, RW_DATA, Non-Trusted DRAM

examples/base-fvp-minimal.txt

@@ -1,6 +1,6 @@
 0x01C090000,   4K, DEVICE, UART0
 0x02C000000,   8K, DEVICE, GICC
-0x02E000000,  64K, NORMAL, Non-Trusted SRAM
+0x02E000000,  64K, RW_DATA, Non-Trusted SRAM
 0x02F000000,  64K, DEVICE, GICv3 GICD
 0x02F100000,   1M, DEVICE, GICv3 GICR
-0x080000000,   2G, NORMAL, Non-Trusted DRAM
+0x080000000,   2G, RW_DATA, Non-Trusted DRAM

pgtt/codegen.py

@@ -9,6 +9,7 @@
 from . import log
 from . import mmu
 from . import table
+from . import mmap
 from .mmap import Region
 
 
@@ -53,11 +54,12 @@ def _mk_blocks( n:int, t:table.Table, idx:int, r:Region ) -> str:
         r
                     the memory region
     """
-    if r.is_device:
+    if r.memory_type == mmap.MEMORY_TYPE.device:
         template_reg = "x2" if t.level < 3 else "x3"
-    else:
+    elif r.memory_type == mmap.MEMORY_TYPE.rw_data:
         template_reg = "x4" if t.level < 3 else "x5"
-
+    else:
+        template_reg = "x20" if t.level < 3 else "x21"
     return f"""
 
 program_table_{n}_entry_{idx}{f'_to_{idx + r.num_contig - 1}' if r.num_contig > 1 else ''}:
@@ -203,10 +205,13 @@ def _mk_asm() -> str:
 
 load_descriptor_templates:
 
-    LDR     x2, ={mmu.block_template(is_device=True)}       // Device block
-    LDR     x3, ={mmu.page_template(is_device=True)}        // Device page
-    LDR     x4, ={mmu.block_template(is_device=False)}      // Normal block
-    LDR     x5, ={mmu.page_template(is_device=False)}       // Normal page
+    LDR     x2, ={mmu.block_template(memory_type=mmap.MEMORY_TYPE.device)}       // Device block
+    LDR     x3, ={mmu.page_template(memory_type=mmap.MEMORY_TYPE.device)}        // Device page
+    LDR     x4, ={mmu.block_template(memory_type=mmap.MEMORY_TYPE.rw_data)}      // RW data block
+    LDR     x5, ={mmu.page_template(memory_type=mmap.MEMORY_TYPE.rw_data)}       // RW data page
+    LDR     x20, ={mmu.block_template(memory_type=mmap.MEMORY_TYPE.code)}      // code block
+    LDR     x21, ={mmu.page_template(memory_type=mmap.MEMORY_TYPE.code)}       // code page
+    
 {_mk_asm()}
 
 init_done:

pgtt/mmap.py

@@ -5,6 +5,7 @@
 """
 
 # Standard Python deps
+from enum import Enum
 import errno
 import re
 import sys
@@ -17,17 +18,21 @@
 # External deps
 from intervaltree import Interval, IntervalTree
 
-
+class MEMORY_TYPE(Enum):
+        device = 0,
+        rw_data = 1,
+        code = 2
 @dataclass
 class Region:
     """
     Class representing a single region in the memory map.
     """
-    lineno: int             # line number in source memory map file
-    label: str              # name/label e.g. DRAM, GIC, UART, ...
-    addr: int               # base address
-    length: int             # length in bytes
-    is_device: bool         # True for Device-nGnRnE, False for Normal WB RAWA
+
+    lineno: int                    # line number in source memory map file
+    label: str                     # name/label e.g. DRAM, GIC, UART, ...
+    addr: int                      # base address
+    length: int                    # length in bytes
+    memory_type: MEMORY_TYPE         # True for Device-nGnRnE, False for Normal WB RAWA
     num_contig = 1
 
 
@@ -36,7 +41,7 @@ def copy( self, **kwargs ):
         Create a duplicate of this Region.
         Use kwargs to override this region's corresponding properties.
         """
-        region = Region(self.lineno, self.label, self.addr, self.length, self.is_device)
+        region = Region(self.lineno, self.label, self.addr, self.length, self.memory_type)
         for kw,arg in kwargs.items():
             region.__dict__[kw] = arg
         return region
@@ -46,8 +51,8 @@ def __str__( self ):
         """
         Override default __str__ to print addr and length in hex format.
         """
-        return "Region(lineno={}, label='{}', addr={}, length={}, is_device={}".format(
-            self.lineno, self.label, hex(self.addr), hex(self.length), self.is_device
+        return "Region(lineno={}, label='{}', addr={}, length={}, memory_type={}".format(
+            self.lineno, self.label, hex(self.addr), hex(self.length), self.memory_type
         )
 
 
@@ -135,10 +140,15 @@ def abort_bad_region( msg:str, variable ) -> None:
                     Parse region attributes.
                     """
                     log.debug(f"parsing attributes: {attrs}")
-                    if not attrs in ["NORMAL", "DEVICE"]:
+                    if not attrs in ["RW_DATA", "DEVICE", "CODE"]:
                         abort_bad_region("attributes", attrs)
-                    is_device = (attrs == "DEVICE")
-                    log.debug(f"{is_device=}")
+                    if attrs == "DEVICE":
+                        memory_type = MEMORY_TYPE.device
+                    elif attrs == "RW_DATA":
+                        memory_type = MEMORY_TYPE.rw_data
+                    else:
+                        memory_type = MEMORY_TYPE.code
+                    log.debug(f"{memory_type=}")
 
                     """
                     Check for overlap with other regions.
@@ -155,7 +165,7 @@ def abort_bad_region( msg:str, variable ) -> None:
                     """
                     Add parsed region to memory map.
                     """
-                    r = Region(lineno+1, label, addr, length, is_device)
+                    r = Region(lineno+1, label, addr, length, memory_type)
                     self._ivtree.addi(addr, addr+length, r)
                     log.debug(f"added {r}")
 

pgtt/mmu.py

@@ -13,6 +13,7 @@
 from . import args
 from . import log
 from .register import Register
+from . import mmap
 
 
 """
@@ -105,52 +106,55 @@ def _sctlr() -> str:
     reg.field( 0,  0, "m", 1)    # MMU enabled
     reg.field( 2,  2, "c", 1)    # D-side access cacheability controlled by pgtables
     reg.field(12, 12, "i", 1),   # I-side access cacheability controlled by pgtables
-    reg.field(25, 25, "ee", 0),  # D-side accesses are little-endian
-
-    """
-    Bits that are RES1 at all exception levels.
-    """
-    [reg.res1(x) for x in [4,5,11,16,18,22,23,28,29]]
-
-    """
-    Exception level specific differences.
-    """
-    if args.el == 1:
-        reg.res1(20)
+
 
     return hex(reg.value())
 
 sctlr = _sctlr()
 
 
-def _template_block_page( is_device:bool, is_page:bool ):
+def _template_block_page( memory_type:mmap.MEMORY_TYPE, is_page:bool ):
     """
     Translation table entry fields common across all exception levels.
     """
     pte = Register("pte")
     pte.field( 0,  0, "valid", 1)
     pte.field( 1,  1, "[1]", int(is_page))
-    pte.field( 4,  2, "attrindx", int(is_device))
+    if memory_type == mmap.MEMORY_TYPE.device:
+        pte.field( 4,  2, "attrindx", 1)
+    elif memory_type == mmap.MEMORY_TYPE.rw_data:
+        pte.field( 4,  2, "attrindx", 0)
+        pte.field( 7,  6, "AP", 0)
+    else:
+        pte.field( 4,  2, "attrindx", 0)
+        pte.field( 7,  6, "AP", 2)
+
     pte.field( 9,  8, "sh", 3)  # Inner Shareable, ignored by Device memory
     pte.field(10, 10, "af", 1)  # Disable Access Flag faults
 
     """
     Exception level specific differences.
     """
-    if args.el == 1:
-        pte.field(53, 53, "pxn", int(is_device))
+    if memory_type == mmap.MEMORY_TYPE.device or memory_type == mmap.MEMORY_TYPE.rw_data:
+        if args.el == 1:
+            pte.field(53, 53, "pxn", 1)
+        else:
+            pte.field(54, 54, "xn", 1)
+
     else:
-        pte.field(54, 54, "xn", int(is_device))
+        if args.el == 1:
+            pte.field(53, 53, "pxn", 0)
+            pte.field(54, 54, "xn", 0)
 
     return hex(pte.value())
 
 
-def block_template( is_device:bool=True ):
-    return _template_block_page(is_device, is_page=False)
+def block_template( memory_type:mmap.MEMORY_TYPE ):
+    return _template_block_page(memory_type, is_page=False)
 
 
-def page_template( is_device:bool=True):
-    return _template_block_page(is_device, is_page=True)
+def page_template( memory_type:mmap.MEMORY_TYPE):
+    return _template_block_page(memory_type, is_page=True)
 
 
 def table_template():

pgtt/table.py

@@ -170,12 +170,18 @@ def __str__( self ) -> str:
                 hyphens = "-" * (len(nested_table.splitlines()[0]) - len(header))
                 string += f"{header}" + hyphens + f"\\\n{nested_table}"
             else:
+                if entry.memory_type == mmap.MEMORY_TYPE.rw_data:
+                    memtype = "RW_Data"
+                elif entry.memory_type == mmap.MEMORY_TYPE.device:
+                    memtype = "Device"
+                else:
+                    memtype = "Code"
                 string += "{}[#{:>4}] 0x{:>012}-0x{:>012}, {}, {}\n".format(
                     margin,
                     k,
                     hex(entry.addr)[2:],
                     hex(entry.addr + entry.length - 1)[2:],
-                    "Device" if entry.is_device else "Normal",
+                    memtype,
                     entry.label
                 )
         return string