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CPU OC and kthermal (Thanks to ktoonsez)
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@ktoonsez @ausdim
ktoonsez authored and ausdim committed Jul 19, 2013
1 parent 3a53c15 commit 86704c7
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Showing 10 changed files with 472 additions and 19 deletions.
2 changes: 1 addition & 1 deletion arch/arm/configs/jf_defconfig
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Expand Up @@ -373,7 +373,7 @@ CONFIG_SENSORS_EPM_ADC=y
CONFIG_THERMAL=y
CONFIG_THERMAL_TSENS8960=y
CONFIG_THERMAL_PM8XXX=y
CONFIG_THERMAL_MONITOR=y
# CONFIG_THERMAL_MONITOR is not set
CONFIG_SEC_THERMISTOR=y
CONFIG_MFD_PM8921_CORE=y
CONFIG_MFD_PM8821_CORE=y
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1 change: 1 addition & 0 deletions arch/arm/mach-msm/Makefile
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Expand Up @@ -272,6 +272,7 @@ obj-$(CONFIG_ARCH_MSM8960) += devices-8960.o
obj-$(CONFIG_ARCH_APQ8064) += devices-8960.o devices-8064.o
obj-$(CONFIG_INPUT_TOUCHSCREEN) += board-mxt540s-tsp.o board-s5000-tsp.o
obj-$(CONFIG_ARCH_APQ8064) += acpuclock-8064.o
obj-$(CONFIG_ARCH_APQ8064) += kthermal.o
board-8960-all-objs += board-8960.o board-8960-camera.o board-8960-display.o board-8960-pmic.o board-8960-storage.o board-8960-gpiomux.o
board-8930-all-objs += board-8930.o board-8930-camera.o board-8930-display.o board-8930-pmic.o board-8930-storage.o board-8930-gpiomux.o devices-8930.o board-8930-gpu.o
board-8064-all-objs += board-8064.o board-8064-pmic.o board-8064-storage.o board-8064-gpiomux.o board-8064-camera.o board-8064-display.o board-8064-gpu.o
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37 changes: 33 additions & 4 deletions arch/arm/mach-msm/acpuclock-8064.c
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Expand Up @@ -17,6 +17,7 @@
#include <mach/rpm-regulator.h>
#include <mach/msm_bus_board.h>
#include <mach/msm_bus.h>
#include <linux/cpufreq.h>

#include "mach/socinfo.h"
#include "acpuclock.h"
Expand Down Expand Up @@ -47,7 +48,7 @@ static struct scalable scalable[] __initdata = {
.aux_clk_sel = 3,
.sec_clk_sel = 2,
.l2cpmr_iaddr = 0x4501,
.vreg[VREG_CORE] = { "krait0", 1300000 },
.vreg[VREG_CORE] = { "krait0", MAX_VDD_SC },
.vreg[VREG_MEM] = { "krait0_mem", 1150000 },
.vreg[VREG_DIG] = { "krait0_dig", 1150000 },
.vreg[VREG_HFPLL_A] = { "krait0_hfpll", 1800000 },
Expand All @@ -58,7 +59,7 @@ static struct scalable scalable[] __initdata = {
.aux_clk_sel = 3,
.sec_clk_sel = 2,
.l2cpmr_iaddr = 0x5501,
.vreg[VREG_CORE] = { "krait1", 1300000 },
.vreg[VREG_CORE] = { "krait1", MAX_VDD_SC },
.vreg[VREG_MEM] = { "krait1_mem", 1150000 },
.vreg[VREG_DIG] = { "krait1_dig", 1150000 },
.vreg[VREG_HFPLL_A] = { "krait1_hfpll", 1800000 },
Expand All @@ -69,7 +70,7 @@ static struct scalable scalable[] __initdata = {
.aux_clk_sel = 3,
.sec_clk_sel = 2,
.l2cpmr_iaddr = 0x6501,
.vreg[VREG_CORE] = { "krait2", 1300000 },
.vreg[VREG_CORE] = { "krait2", MAX_VDD_SC },
.vreg[VREG_MEM] = { "krait2_mem", 1150000 },
.vreg[VREG_DIG] = { "krait2_dig", 1150000 },
.vreg[VREG_HFPLL_A] = { "krait2_hfpll", 1800000 },
Expand All @@ -80,7 +81,7 @@ static struct scalable scalable[] __initdata = {
.aux_clk_sel = 3,
.sec_clk_sel = 2,
.l2cpmr_iaddr = 0x7501,
.vreg[VREG_CORE] = { "krait3", 1300000 },
.vreg[VREG_CORE] = { "krait3", MAX_VDD_SC },
.vreg[VREG_MEM] = { "krait3_mem", 1150000 },
.vreg[VREG_DIG] = { "krait3_dig", 1150000 },
.vreg[VREG_HFPLL_A] = { "krait3_hfpll", 1800000 },
Expand Down Expand Up @@ -496,6 +497,10 @@ static struct acpu_level tbl_PVS0_2000MHz[] __initdata = {
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1175000 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(15), 1225000 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(15), 1287500 },
{ 1, { 1998000, HFPLL, 1, 0x4A }, L2(15), 1300000 },
{ 1, { 2106000, HFPLL, 1, 0x4E }, L2(15), 1350000 },
{ 1, { 2214000, HFPLL, 1, 0x52 }, L2(15), 1400000 },
{ 1, { 2322000, HFPLL, 1, 0x56 }, L2(15), 1425000 },
{ 0, { 0 } }
};

Expand All @@ -518,6 +523,10 @@ static struct acpu_level tbl_PVS1_2000MHz[] __initdata = {
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1137500 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(15), 1187500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(15), 1250000 },
{ 1, { 1998000, HFPLL, 1, 0x4A }, L2(15), 1275000 },
{ 1, { 2106000, HFPLL, 1, 0x4E }, L2(15), 1325000 },
{ 1, { 2214000, HFPLL, 1, 0x52 }, L2(15), 1375000 },
{ 1, { 2322000, HFPLL, 1, 0x56 }, L2(15), 1400000 },
{ 0, { 0 } }
};

Expand All @@ -540,6 +549,10 @@ static struct acpu_level tbl_PVS2_2000MHz[] __initdata = {
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1112500 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(15), 1162500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(15), 1212500 },
{ 1, { 1998000, HFPLL, 1, 0x4A }, L2(15), 1250000 },
{ 1, { 2106000, HFPLL, 1, 0x4E }, L2(15), 1300000 },
{ 1, { 2214000, HFPLL, 1, 0x52 }, L2(15), 1350000 },
{ 1, { 2322000, HFPLL, 1, 0x56 }, L2(15), 1375000 },
{ 0, { 0 } }
};

Expand All @@ -562,6 +575,10 @@ static struct acpu_level tbl_PVS3_2000MHz[] __initdata = {
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1087500 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(15), 1137500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(15), 1175000 },
{ 1, { 1998000, HFPLL, 1, 0x4A }, L2(15), 1225000 },
{ 1, { 2106000, HFPLL, 1, 0x4E }, L2(15), 1275000 },
{ 1, { 2214000, HFPLL, 1, 0x52 }, L2(15), 1325000 },
{ 1, { 2322000, HFPLL, 1, 0x56 }, L2(15), 1350000 },
{ 0, { 0 } }
};

Expand All @@ -584,6 +601,10 @@ static struct acpu_level tbl_PVS4_2000MHz[] __initdata = {
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1075000 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(15), 1112500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(15), 1150000 },
{ 1, { 1998000, HFPLL, 1, 0x4A }, L2(15), 1200000 },
{ 1, { 2106000, HFPLL, 1, 0x4E }, L2(15), 1250000 },
{ 1, { 2214000, HFPLL, 1, 0x52 }, L2(15), 1300000 },
{ 1, { 2322000, HFPLL, 1, 0x56 }, L2(15), 1325000 },
{ 0, { 0 } }
};

Expand All @@ -606,6 +627,10 @@ static struct acpu_level tbl_PVS5_2000MHz[] __initdata = {
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1050000 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(15), 1087500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(15), 1125000 },
{ 1, { 1998000, HFPLL, 1, 0x4A }, L2(15), 1175000 },
{ 1, { 2106000, HFPLL, 1, 0x4E }, L2(15), 1225000 },
{ 1, { 2214000, HFPLL, 1, 0x52 }, L2(15), 1275000 },
{ 1, { 2322000, HFPLL, 1, 0x56 }, L2(15), 1325000 },
{ 0, { 0 } }
};

Expand All @@ -628,6 +653,10 @@ static struct acpu_level tbl_PVS6_2000MHz[] __initdata = {
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1025000 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(15), 1062500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(15), 1100000 },
{ 1, { 1998000, HFPLL, 1, 0x4A }, L2(15), 1150000 },
{ 1, { 2106000, HFPLL, 1, 0x4E }, L2(15), 1200000 },
{ 1, { 2214000, HFPLL, 1, 0x52 }, L2(15), 1250000 },
{ 1, { 2322000, HFPLL, 1, 0x56 }, L2(15), 1300000 },
{ 0, { 0 } }
};

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3 changes: 0 additions & 3 deletions arch/arm/mach-msm/acpuclock-krait.c
View file
Expand Up @@ -56,9 +56,6 @@ int pvs_bin;

extern void reset_num_cpu_freqs(void);

#define MAX_VDD_SC 1400000 /* uV */
#define MIN_VDD_SC 700000 /* uV */

static DEFINE_MUTEX(driver_lock);
static DEFINE_SPINLOCK(l2_lock);

Expand Down
9 changes: 5 additions & 4 deletions arch/arm/mach-msm/board-8064-regulator.c
View file
Expand Up @@ -14,6 +14,7 @@
#include <linux/regulator/pm8xxx-regulator.h>

#include "board-8064.h"
#include <linux/cpufreq.h>

#ifdef CONFIG_REGULATOR_MAX77693
#include <linux/mfd/max77693.h>
Expand Down Expand Up @@ -721,15 +722,15 @@ mpq8064_gpio_regulator_pdata[] __devinitdata = {
/* SAW regulator constraints */
struct regulator_init_data msm8064_saw_regulator_pdata_8921_s5 =
/* ID vreg_name min_uV max_uV */
SAW_VREG_INIT(S5, "8921_s5", 850000, 1300000);
SAW_VREG_INIT(S5, "8921_s5", MIN_VDD_SC, MAX_VDD_SC);
struct regulator_init_data msm8064_saw_regulator_pdata_8921_s6 =
SAW_VREG_INIT(S6, "8921_s6", 850000, 1300000);
SAW_VREG_INIT(S6, "8921_s6", MIN_VDD_SC, MAX_VDD_SC);

struct regulator_init_data msm8064_saw_regulator_pdata_8821_s0 =
/* ID vreg_name min_uV max_uV */
SAW_VREG_INIT(8821_S0, "8821_s0", 850000, 1300000);
SAW_VREG_INIT(8821_S0, "8821_s0", MIN_VDD_SC, MAX_VDD_SC);
struct regulator_init_data msm8064_saw_regulator_pdata_8821_s1 =
SAW_VREG_INIT(8821_S1, "8821_s1", 850000, 1300000);
SAW_VREG_INIT(8821_S1, "8821_s1", MIN_VDD_SC, MAX_VDD_SC);

/* PM8921 regulator constraints */
struct pm8xxx_regulator_platform_data
Expand Down
14 changes: 10 additions & 4 deletions arch/arm/mach-msm/cpufreq.c
View file
Expand Up @@ -136,6 +136,9 @@ static int set_cpu_freq(struct cpufreq_policy *policy, unsigned int new_freq)
return 0;
}
#endif
if (new_freq > 0 && new_freq > kthermal_limit)
new_freq = kthermal_limit;
//pr_alert("KT SET CPU FREQ %u-%u-%u\n", new_freq, policy->cur, policy->cpu);

freqs.old = policy->cur;
freqs.new = new_freq;
Expand Down Expand Up @@ -169,6 +172,8 @@ static int msm_cpufreq_target(struct cpufreq_policy *policy,
ret = -EFAULT;
goto done;
}
if (kthermal_limit > 0 && target_freq > kthermal_limit)
target_freq = kthermal_limit;

table = cpufreq_frequency_get_table(policy->cpu);
if (cpufreq_frequency_table_target(policy, table, target_freq, relation,
Expand All @@ -178,7 +183,7 @@ static int msm_cpufreq_target(struct cpufreq_policy *policy,
goto done;
}

pr_debug("CPU[%d] target %d relation %d (%d-%d) selected %d\n",
pr_debug("KT CPU[%d] target %d relation %d (%d-%d) selected %d\n",
policy->cpu, target_freq, relation,
policy->min, policy->max, table[index].frequency);

Expand Down Expand Up @@ -291,10 +296,11 @@ static int __cpuinit msm_cpufreq_init(struct cpufreq_policy *policy)
#endif

#ifdef CONFIG_SEC_DVFS
cpuinfo_max_freq = policy->cpuinfo.max_freq;
cpuinfo_min_freq = policy->cpuinfo.min_freq;
cpuinfo_max_freq = GLOBALKT_MAX_FREQ_LIMIT; //policy->cpuinfo.max_freq;
cpuinfo_min_freq = GLOBALKT_MIN_FREQ_LIMIT; //policy->cpuinfo.min_freq;
#endif

pr_alert("MSM_CPUFREQ_INIT: %d-%d-%d\n", cpuinfo_max_freq, policy->max, policy->cpuinfo.max_freq);

cur_freq = acpuclk_get_rate(policy->cpu);
if (cpufreq_frequency_table_target(policy, table, cur_freq,
CPUFREQ_RELATION_H, &index) &&
Expand Down

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