Sail 15 ARM 8.4, working Sail->GenC checkpoint

later work deletes GenC logic and replaces with brig codegen

GenC simple function emission

Remove `--force` flag and associated logic

Decades of research has found no use for overwriting protection

BOOM, control flow, clean slate

Repo had a lot of large files that needed removing, this tag marks the point before which some commits may fail to build/pass tests due to the missing snapshot files.

Instruction decoder from GenC emitted by Borealis working 🎉

End of semester 1 milestone; we can now:

1. Take an ARM Sail specification (compiled from ASL)
2. Use Borealis to compile the Sail to GenC
3. Use GenSim to emit a decoder
4. Use the decoder on a sample sequence of instructions