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[dependencies.std] | ||
features = ["panic_unwind"] | ||
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[dependencies.test] | ||
stage = 1 | ||
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[target.avr-atmega328p.dependencies] | ||
core = { git = "https://github.com/avr-rust/libcore", branch = "rust-26015da0" } |
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#! /bin/sh | ||
export AVR_CPU_FREQUENCY=16000000 | ||
xargo build --target avr-atmega328p $@ |
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#![no_std] | ||
#![no_main] | ||
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extern crate arduino; | ||
use arduino::cores::current; | ||
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// Some devices may have multiple SPI modules. | ||
// The ATmega328p only has one. | ||
type Spi = current::Spi; | ||
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#[no_mangle] | ||
pub extern fn main() { | ||
} | ||
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# Generated automatically. | ||
config.rs |
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use config; | ||
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/// A clock mask. | ||
/// | ||
/// The format looks like this | ||
/// | ||
/// ``` | ||
/// 0b00000<1><0><2x> | ||
/// ``` | ||
/// | ||
/// Where | ||
/// | ||
/// * `1` is the value of the `SPR1` bit | ||
/// * `0` is the value of the `SPR0` bit | ||
/// * `2x` indicates if double speed mode is enabled | ||
#[derive(Copy, Clone)] | ||
pub struct ClockMask(pub u8); | ||
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impl ClockMask { | ||
/// Gets the clock mask for a specific baute rate. | ||
pub fn with_clock(spi_clock: u32) -> ClockMask { | ||
let mut divider_bits = if spi_clock >= config::CPU_FREQUENCY / 2 { | ||
0 | ||
} else if spi_clock >= config::CPU_FREQUENCY / 4 { | ||
1 | ||
} else if spi_clock >= config::CPU_FREQUENCY / 8 { | ||
2 | ||
} else if spi_clock >= config::CPU_FREQUENCY / 16 { | ||
3 | ||
} else if spi_clock >= config::CPU_FREQUENCY / 32 { | ||
4 | ||
} else if spi_clock >= config::CPU_FREQUENCY / 64 { | ||
5 | ||
} else { | ||
6 | ||
}; | ||
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// Invert the SPI2X bit | ||
divider_bits ^= 0x1; | ||
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// Compensate for the duplicate F_osc/64 | ||
if divider_bits == 6 { | ||
divider_bits = 7; | ||
} | ||
ClockMask(divider_bits) | ||
} | ||
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pub fn control_register_mask(self) -> u8 { | ||
// SPR1 and SPR0 | ||
// These both form bits 1 and 0 of the control register. | ||
(self.0 & 0b110) >> 1 | ||
} | ||
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pub fn status_register_mask(self) -> u8 { | ||
// SPI2x | ||
// This forms bit 0 of the status register. | ||
self.0 & 0b1 | ||
} | ||
} | ||
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