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Added support for AVR-DA and DB devices #881

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merged 3 commits into from
Jul 1, 2022
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jhol
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@jhol jhol commented Apr 1, 2022

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In recent Microchip Packs, XML architecture description files are now
named with the .atdf extension, rather than .xml . This patch updates
the script accordingly
This patch adds support for the following devices:

  - avr32da28
  - avr32da32
  - avr32da48
  - avr64da28
  - avr64da32
  - avr64da48
  - avr64da64
  - avr128da28
  - avr128da32
  - avr128da48
  - avr128da64
  - avr32db28
  - avr32db32
  - avr32db48
  - avr64db28
  - avr64db32
  - avr64db48
  - avr64db64
  - avr128db28
  - avr128db32
  - avr128db48
  - avr128db64
  - avr16dd14
  - avr16dd20
  - avr16dd28
  - avr16dd32
  - avr32dd14
  - avr32dd20
  - avr32dd28
  - avr32dd32
  - avr64dd14
  - avr64dd20
  - avr64dd28
  - avr64dd32

ioavr*.h are from latest Atmel.AVR-Dx_DFP.2.0.141.atpack
(http://packs.download.atmel.com/)

avrd*.S are generated from .atdf files
@jhol
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jhol commented Apr 1, 2022

This patch adds support for these devices to GCC:
https://gcc.gnu.org/pipermail/gcc-patches/2022-April/592669.html

@dl8dtl
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dl8dtl commented Apr 1, 2022

Funny, I started doing that merge myself a couple of weeks ago. ;-)
Curious, did you actually try whether the EEPROM routines do work? That's where I holded back my initial attempt, after reading a bit of and on, seeing the NVIC controller in these newer devices is quite a bit different from the previous Xmega one.

So it would be good to know if it's confirmed to work or not.

@jhol
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jhol commented Apr 2, 2022

Curious, did you actually try whether the EEPROM routines do work? That's where I holded back my initial attempt, after reading a bit of and on, seeing the NVIC controller in these newer devices is quite a bit different from the previous Xmega one.

Ahh... sorry, that was on my todo list, but I negelected to cover that part. I don't have any need for EEPROM-write in my application, so I didn't cover it so far.

Everything else seems to be working great. My project uses registers from CLK, INT, SLP, TCB, EVSYS, CCL, UART, TWI, SPI, PORT, PORTMUX, FUSE, and so far I have encountered zero issues.

@dl8dtl dl8dtl merged commit d1a1dfa into avrdudes:main Jul 1, 2022
@sprintersb
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sprintersb commented Sep 23, 2022

This patch adds support for these devices to GCC:
https://gcc.gnu.org/pipermail/gcc-patches/2022-April/592669.html

Hi Joel, there are some bugs in that GCC patch, so I allow me to write here instead of opening a GCC issue.

Only for devices in families avrtiny and avrxmega3, avr-gcc (and the respective Binutils emulation for that matter) support flash-in-ram-address-space. Hence the last entry in

AVR_MCU ("avr64db64", ARCH_AVRXMEGA2, ..., 0x8000, 0x10000)

must be 0. Non-zero values are ignored for that family, so the entry of 0x10000 is confusing at least.

The 2nd-last value must be the flash size in bytes, presumably something around 0x10000 for a AVR64DBxx.

Dito for similar entries under avrxmega2 and avrxmega4,

Only if the AVR32Dxxx devices support flash-in-ram-space they are correct in avrxmega3; otherwise they must go somewhere else.

@jhol
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jhol commented Sep 24, 2022

@sprintersb Thanks for the review. I'll revise the patch and resubmit it..

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3 participants