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System Verilog implementation of duplex Universal Asynchronous Receiver Transmitter (UART) for 7 bit data packet

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ayush-agarwal-0502/Duplex-UART-System-Verilog

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Duplex-UART-System-Verilog

System Verilog implementation of duplex Universal Asynchronous Receiver Transmitter (UART) for 7 bit data packet

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UART stands for Universal Asynchronous Receiver Transmitter . It is widely used as a hardware communication protocol since it does not require the clocks to be in sync with each other (hence asynchronous) . Duplex system means that the device can transmit and receive data at the same time .

UART transmitter converts multi bit data into single bit data to transmit it , whereas UART Receiver takes the incoming single bit data and reassembles it into packet . In my implementation of UART module , the UART Transmitter starts transmitting when posedge is given to the start pin . The UART receiver starts receiving when the first incoming bit is 1 (high) .

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System Verilog implementation of duplex Universal Asynchronous Receiver Transmitter (UART) for 7 bit data packet

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