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active-host-test: started RTL
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davidlenfesty committed Jan 2, 2021
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5 changes: 5 additions & 0 deletions rtl/active-host-test/.gitignore
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*.cache
*.hw
*.ip_user_files
*.runs
*.sim
9 changes: 9 additions & 0 deletions rtl/active-host-test/README.md
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# Active host test gateware

The plan is just a simple register interface to everything.

- A small state machine to control the USB-C side that can be
controlled/queried via a few SPI registers.
- The simplest possible register interface to the UART peripheral.
- A register interface to control the io pins.
Tests will be contained in... `tests/` and written in CocoTB.
39 changes: 39 additions & 0 deletions rtl/active-host-test/active-host-test.srcs/constrs_1/new/test.xdc
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## Input clock (100MHz)... maybe it should be 25MHz or something?
set_property IOSTANDARD LVCMOS33 [get_ports emcclk]
set_property PACKAGE_PIN A10 [get_ports emcclk]
create_clock -period 10.000 -name emcclk_100mhz -waveform {0.000 5.000} [get_ports emcclk]

#### All IO assignments below here are temporary and dependant on final schematic.

## UART Connections (to probe)
# There's a way to do this, not sure if this is valid...
set_property IOSTANDARD LVCMOS33 [get_ports sbu[*]]
set_property PACKAGE_PIN K12 [get_ports sbu[1]]
set_property PACKAGE_PIN L12 [get_ports sbu[0]]

## I2C Connections (to USB-C controller)
set_property IOSTANDARD LVCMOS33 [get_ports i2c_sda]
set_property IOSTANDARD LVCMOS33 [get_ports i2c_scl]
set_property IOSTANDARD LVCMOS33 [get_ports i2c_int]
set_property PACKAGE_PIN G14 [get_ports i2c_sda]
set_property PACKAGE_PIN H14 [get_ports i2c_scl]
set_property PACKAGE_PIN J14 [get_ports i2c_int]
set_property PULLUP TRUE [get_ports i2c_sda]
set_property PULLUP TRUE [get_ports i2c_scl]

## Power Gates
set_property IOSTANDARD LVCMOS33 [get_ports probe_pwr_en]
set_property IOSTANDARD LVCMOS33 [get_ports probe_vbus_en_b]
set_property PACKAGE_PIN L14 [get_ports probe_pwr_en]
set_property PACKAGE_PIN M14 [get_ports probe_vbus_en_b]

## SPI Device Interface
set_property IOSTANDARD LVCMOS33 [get_ports spi_copi]
set_property IOSTANDARD LVCMOS33 [get_ports spi_cipo]
set_property IOSTANDARD LVCMOS33 [get_ports spi_cs]
set_property IOSTANDARD LVCMOS33 [get_ports spi_clk]
set_property PACKAGE_PIN N14 [get_ports spi_copi]
set_property PACKAGE_PIN N13 [get_ports spi_cipo]
set_property PACKAGE_PIN P13 [get_ports spi_cs]
set_property PACKAGE_PIN P12 [get_ports spi_clk]
set_property PULLUP TRUE [get_ports spi_cs]
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`timescale 1ns / 1ps
`default_nettype none

`include "I2CTransceiver.svh"

module active_host#(
parameter USB_CTRL_ADDR = 8'h44
) (
input wire emcclk,

// UART over SBU wires.
// TX and RX depend on cable orientation thus these must be tri-stated.
inout wire logic [1:0] sbu,

// USB-C Controller I2C Connection
inout wire logic i2c_sda,
output logic i2c_scl,
input wire i2c_int,

// Power gating signals
output logic probe_pwr_en,
output logic probe_vbus_en_b,

// Control SPI interface
input wire spi_copi,
output logic spi_cipo,
input wire spi_cs,
input wire spi_clk
);

// Reset control
logic rst = 1;
logic [3:0] rst_ctr = 0;
always_ff @(posedge emcclk) begin : reset_p
if (rst_ctr < 15) begin
rst_ctr <= rst_ctr + 1;
rst <= 1;
end else begin
rst <= 0;
end
end : reset_p

// --------- USB-C Control
enum {

} usb_state;
logic i2c_in_t i2c_cin;
logic i2c_out_t i2c_cout;
I2CTransceiver i2c_driver(
.clk (emcclk ),
.clkdiv (1000 ), // 100Mhz -> 100kHz

.i2c_scl (i2c_scl ),
.i2c_sda (i2c_sda ),

.cin (i2c_cin ),
.cout (i2c_cout )
);
I2CRegisterHelper i2c_register(
.clk (emcclk ),
.slave_addr (USB_CTRL_ADDR ),

.request ( ), // NC - no arbiter
.done ( ), // NC - no arbiter
.ack (1'b1 ), // No arbiter - should always ACK
.cin (i2c_cin ),
.cout (i2c_cout )
);

always_ff @(posedge emcclk) begin : usb_c_p
if (rst) begin

end else begin

end
end : usb_c_p

endmodule

`default_nettype wire

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