Every logic analyzer available today samples asychrnously. On slower systems this is needlessly wasteful.
This logic analyzer works as a state mode capture. A clock on the device-under-test (DUT) drives the capture.
More to come...
RP2040-Based Logic Analyzer that captures "state" mode
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baldengineer/State-Mode-Logic-Analyzer
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RP2040-Based Logic Analyzer that captures "state" mode
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