Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Production Board eeprom #5

Closed
RobertCNelson opened this issue Sep 2, 2021 · 24 comments
Closed

Production Board eeprom #5

RobertCNelson opened this issue Sep 2, 2021 · 24 comments

Comments

@RobertCNelson
Copy link
Member

RobertCNelson commented Sep 2, 2021

Prototype has:

0000: aa 55 33 ee 01 37 00 10 2e 00 4a 37 32 31 45 58    .U3..7....J721EX
0010: 2d 50 4d 32 2d 53 4f 4d 00 00 45 38 30 30 37 38    -PM2-SOM..E80078
0020: 30 31 45 38 00 00 30 31 30 31 32 33 32 31 00 00    01E8..01012321..
0030: 00 00 00 00 30 31 37 39 11 02 00 60 7d fe ff ff    ....0179...`}...

at a minimal, need replacement for:
J721EX-PM2-SOM section

Requirements:

	char name[AM6_EEPROM_HDR_NAME_LEN];
	char version[AM6_EEPROM_HDR_VERSION_LEN];
	char proc_number[AM6_EEPROM_HDR_PROC_NR_LEN];
	char variant[AM6_EEPROM_HDR_VARIANT_LEN];
	char pcb_revision[AM6_EEPROM_HDR_PCB_REV_LEN];
	char schematic_bom_revision[AM6_EEPROM_HDR_SCH_BOM_REV_LEN];
	char software_revision[AM6_EEPROM_HDR_SW_REV_LEN];
	char vendor_id[AM6_EEPROM_HDR_VID_LEN];
	char build_week[AM6_EEPROM_HDR_BLD_WK_LEN];
	char build_year[AM6_EEPROM_HDR_BLD_YR_LEN];
	char board_4p_number[AM6_EEPROM_HDR_4P_NR_LEN];
	char serial[AM6_EEPROM_HDR_SERIAL_LEN];

https://github.com/beagleboard/u-boot/blob/v2021.01-ti-08.00.00.004/board/ti/j721e/evm.c#L29-L38

https://github.com/beagleboard/u-boot/blob/v2021.01-ti-08.00.00.004/board/ti/common/board_detect.h#L84-L97

@RobertCNelson RobertCNelson changed the title Default eeprom Default Board eeprom Sep 2, 2021
@RobertCNelson RobertCNelson changed the title Default Board eeprom Production Board eeprom Sep 2, 2021
@jadonk
Copy link
Sponsor Member

jadonk commented Sep 7, 2021

@FionaYu20180326 says the team had some issues in writing the EEPROM. We should sync up on Slack.

@mingzhangqun
Copy link
Collaborator

Error reading EEPROM during uboot, I think it's because of the chip difference.
image

@mingzhangqun
Copy link
Collaborator

mingzhangqun commented Sep 7, 2021

This EEPROM only supports 1byte addr.
image

@mingzhangqun
Copy link
Collaborator

I have submitted a PR about this error.
https://github.com/beagleboard/u-boot/pull/4

@RobertCNelson
Copy link
Member Author

I've merged the patch, BUT we should really look at i2c eeprom's compatible with the mainline approach, it would suck if our board needed to be patched, vs the mainline eeprom detection routines.. (the point of the eeprom is many boards = one u-boot build...) @jadonk

@FionaYu20180326
Copy link
Collaborator

We propose to use small size EEPROM due to cost and footprint dimensions. If we do not update software, we should use same EEPROM part as EVM to keep same address. The footprint TSSOP8 is too big to locate and cost $1.44. Now what we use is footprint SOT23-5 and cost $0.14.

@RobertCNelson
Copy link
Member Author

@nmenon @jadonk @FionaYu20180326 @mingzhangqun how about?

J721EX-PM2-SOM

Options:

BBONE-AI-64000
BBONE-AI-64-RA
J721EX-BBAI-64

For the board name in eeprom?

@RobertCNelson
Copy link
Member Author

BBONE-AI-64-B0

@RobertCNelson
Copy link
Member Author

BBONEAI-64-B0A

@jadonk
Copy link
Sponsor Member

jadonk commented Sep 23, 2021

Can we leave whitespace in the version?

@RobertCNelson
Copy link
Member Author

Okay final option: ;)

@mingzhangqun and @FionaYu20180326 let's use this value in eeprom in replace of J721EX-PM2-SOM..

BBONEAI-64-B0-
42 42 4f 4e 45 41 49 2d 36 34 2d 42 30 2d

I'll start patching u-boot..

@RobertCNelson
Copy link
Member Author

U-boot is setup for this "new" eeprom:

beagleboard/u-boot@d87d182

Regards,

@jadonk
Copy link
Sponsor Member

jadonk commented Sep 24, 2021

@RobertCNelson do you have the file to go in the EEPROM?

@RobertCNelson
Copy link
Member Author

I'll create a dump file from:

	"eeprom_bbai=i2c dev 0; "					\
		"i2c md 0x50 0x00.1 20; "				\
		"i2c mw 0x50 0x00.1 aa; "				\
		"i2c mw 0x50 0x01.1 55; "				\
		"i2c mw 0x50 0x02.1 33; "				\
		"i2c mw 0x50 0x03.1 ee; "				\
		"i2c mw 0x50 0x04.1 01; "				\
		"i2c mw 0x50 0x05.1 37; "				\
		"i2c mw 0x50 0x06.1 00; "				\
		"i2c mw 0x50 0x07.1 10; "				\
		"i2c mw 0x50 0x08.1 2e; "				\
		"i2c mw 0x50 0x09.1 00; "				\
		"i2c mw 0x50 0x0a.1 42; "				\
		"i2c mw 0x50 0x0b.1 42; "				\
		"i2c mw 0x50 0x0c.1 4f; "				\
		"i2c mw 0x50 0x0d.1 4e; "				\
		"i2c mw 0x50 0x0e.1 45; "				\
		"i2c mw 0x50 0x0f.1 41; "				\
		"i2c mw 0x50 0x10.1 49; "				\
		"i2c mw 0x50 0x11.1 2d; "				\
		"i2c mw 0x50 0x12.1 36; "				\
		"i2c mw 0x50 0x13.1 34; "				\
		"i2c mw 0x50 0x14.1 2d; "				\
		"i2c mw 0x50 0x15.1 42; "				\
		"i2c mw 0x50 0x16.1 30; "				\
		"i2c mw 0x50 0x17.1 2d; "				\
		"i2c md 0x50 0x00.1 20; "				\
		"\0"							\

@RobertCNelson
Copy link
Member Author

0000000 55aa ee33 3701 1000 002e 4242 4e4f 4145
0000010 2d49 3436 422d 2d30 ffff ffff ffff ffff

@RobertCNelson
Copy link
Member Author

@mingzhangqun
Copy link
Collaborator

I submitted a PR to resolve error -121:
https://github.com/beagleboard/u-boot/pull/8

@mingzhangqun
Copy link
Collaborator

Run script to write 0x51(is the high page):

"eeprom_bbai=i2c dev 0; "					\
	"i2c md 0x51 0x00.1 20; "				\
	"i2c mw 0x51 0x00.1 aa; "				\
	"i2c mw 0x51 0x01.1 55; "				\
	"i2c mw 0x51 0x02.1 33; "				\
	"i2c mw 0x51 0x03.1 ee; "				\
	"i2c mw 0x51 0x04.1 01; "				\
	"i2c mw 0x51 0x05.1 37; "				\
	"i2c mw 0x51 0x06.1 00; "				\
	"i2c mw 0x51 0x07.1 10; "				\
	"i2c mw 0x51 0x08.1 2e; "				\
	"i2c mw 0x51 0x09.1 00; "				\
	"i2c mw 0x51 0x0a.1 42; "				\
	"i2c mw 0x51 0x0b.1 42; "				\
	"i2c mw 0x51 0x0c.1 4f; "				\
	"i2c mw 0x51 0x0d.1 4e; "				\
	"i2c mw 0x51 0x0e.1 45; "				\
	"i2c mw 0x51 0x0f.1 41; "				\
	"i2c mw 0x51 0x10.1 49; "				\
	"i2c mw 0x51 0x11.1 2d; "				\
	"i2c mw 0x51 0x12.1 36; "				\
	"i2c mw 0x51 0x13.1 34; "				\
	"i2c mw 0x51 0x14.1 2d; "				\
	"i2c mw 0x51 0x15.1 42; "				\
	"i2c mw 0x51 0x16.1 30; "				\
	"i2c mw 0x51 0x17.1 2d; "				\
	"i2c md 0x51 0x00.1 20; "				\
	"\0"							\

Then startup:
image

@jim255
Copy link
Collaborator

jim255 commented Oct 28, 2021

I get eeprom_bbai=i2c dev 0; : command not found.
????

@RobertCNelson
Copy link
Member Author

@jim255 just commited: beagleboard/u-boot@ef0e2e3 building now..

@RobertCNelson
Copy link
Member Author

RobertCNelson commented Jan 11, 2022

=> i2c dev 0
=> i2c md 0x51 0x00.1 20
0000: aa 55 33 ee 01 37 00 10 2e 00 42 42 4f 4e 45 41    .U3..7....BBONEA
0010: 49 2d 36 34 2d 42 30 2d ff ff ff ff ff ff ff ff    I-64-B0-........
=> i2c md 0x51 0x00.1 40
0000: aa 55 33 ee 01 37 00 10 2e 00 42 42 4f 4e 45 41    .U3..7....BBONEA
0010: 49 2d 36 34 2d 42 30 2d ff ff ff ff ff ff ff ff    I-64-B0-........
0020: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
0030: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................

Magic number 0000-0003

=> i2c md 0x51 0x00.1 4 
0000: aa 55 33 ee    .U3.

Type: (0004) -Fixed length and variable position board ID header

=> i2c md 0x51 0x00.1 5
0000: aa 55 33 ee 01    .U3..

Type: (0007-0008) - Size of payload bytes following this field including end_list byte

=> i2c md 0x51 0x00.1 7
0000: aa 55 33 ee 01 37 00    .U3..7.

Board Info

@RobertCNelson
Copy link
Member Author

i2c dev 0;

i2c md 0x51 0x00.1 40;

#magic number
i2c mw 0x51 0x00.1 aa;
i2c mw 0x51 0x01.1 55;
i2c mw 0x51 0x02.1 33;
i2c mw 0x51 0x03.1 ee;

#type
i2c mw 0x51 0x04.1 01;

#payload size
i2c mw 0x51 0x05.1 37;
i2c mw 0x51 0x06.1 00;

#BRD_INFO - fixed 10
i2c mw 0x51 0x07.1 10;

#fixed
i2c mw 0x51 0x08.1 2e;
i2c mw 0x51 0x09.1 00;

#Board_Name
i2c mw 0x51 0x0a.1 42;
i2c mw 0x51 0x0b.1 42;
i2c mw 0x51 0x0c.1 4f;
i2c mw 0x51 0x0d.1 4e;
i2c mw 0x51 0x0e.1 45;
i2c mw 0x51 0x0f.1 41;
i2c mw 0x51 0x10.1 49;
i2c mw 0x51 0x11.1 2d;
i2c mw 0x51 0x12.1 36;
i2c mw 0x51 0x13.1 34;
i2c mw 0x51 0x14.1 2d;
i2c mw 0x51 0x15.1 42;
i2c mw 0x51 0x16.1 30;
i2c mw 0x51 0x17.1 2d;
i2c mw 0x51 0x18.1 00;
i2c mw 0x51 0x19.1 00;

#Design_Rev - B0
i2c mw 0x51 0x1a.1 42;
i2c mw 0x51 0x1b.1 30;

#PROC_Nbr - 0078 (SK)
i2c mw 0x51 0x1c.1 30;
i2c mw 0x51 0x1d.1 30;
i2c mw 0x51 0x1e.1 37;
i2c mw 0x51 0x1f.1 38;

#Variant - 01
i2c mw 0x51 0x20.1 30;
i2c mw 0x51 0x21.1 31;

#PCB_Rev - B0
i2c mw 0x51 0x22.1 42;
i2c mw 0x51 0x23.1 30;

#SCHBOM_Rev - 00
i2c mw 0x51 0x24.1 30;
i2c mw 0x51 0x25.1 30;

#SWR_Rev - 01
i2c mw 0x51 0x26.1 30;
i2c mw 0x51 0x27.1 31;

#VendorID - 64
i2c mw 0x51 0x28.1 36;
i2c mw 0x51 0x29.1 34;

#Build_Week - 'WW - seeed update...
i2c mw 0x51 0x2a.1 57;
i2c mw 0x51 0x2b.1 57;

#Build_Year - 22
i2c mw 0x51 0x2c.1 32;
i2c mw 0x51 0x2d.1 32;

#BoardID - BBBBBB - Seeed update
i2c mw 0x51 0x2e.1 42;
i2c mw 0x51 0x2f.1 42;
i2c mw 0x51 0x30.1 42;
i2c mw 0x51 0x31.1 42;
i2c mw 0x51 0x32.1 42;
i2c mw 0x51 0x33.1 42;

#Serial_Nbr - SSSS
i2c mw 0x51 0x34.1 53;
i2c mw 0x51 0x35.1 53;
i2c mw 0x51 0x36.1 53;
i2c mw 0x51 0x37.1 53;

DDR

Type - 
i2c mw 0x51 0x38.1 11;

Length -
i2c mw 0x51 0x39.1 02;
i2c mw 0x51 0x3a.1 00;

DDR Contrl -
i2c mw 0x51 0x3b.1 60;
i2c mw 0x51 0x3c.1 7d;

End frame -
i2c mw 0x51 0x3d.1 fe;
02 00 60 7d fe

i2c md 0x51 0x00.1 40;
=> run eeprom_production_bbai 
Setting bus to 0
0000: aa 55 30 ee 01 37 00 10 2e 00 42 42 4f 4e 45 41    .U0..7....BBONEA
0010: 49 2d 36 34 2d 42 30 2d ff ff ff ff ff ff ff ff    I-64-B0-........
0020: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
0030: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
0000: aa 55 33 ee 01 37 00 10 2e 00 42 42 4f 4e 45 41    .U3..7....BBONEA
0010: 49 2d 36 34 2d 42 30 2d 00 00 42 30 30 30 37 38    I-64-B0-..B00078
0020: 30 31 42 30 30 30 30 31 36 34 57 57 32 32 42 42    01B0000164WW22BB
0030: 42 42 42 42 53 53 53 53 11 02 00 60 7d fe ff ff    BBBBSSSS...`}...
=> reset
resetting ...

U-Boot SPL 2021.01-g3cfbb95f (Jan 11 2022 - 17:23:36 +0000)
Model: Texas Instruments K3 J721E SoC
Board: BBONEAI-64-B0- rev B0
SYSFW ABI: 3.1 (firmware rev 0x0015 '21.5.0--v2021.05 (Terrific Llam')
Trying to boot from MMC1
init_env from device 17 not supported!
Starting ATF on ARM64 core...

NOTICE:  BL31: v2.5(release):e0d9fdb
NOTICE:  BL31: Built : 20:08:51, Jan  7 2022

U-Boot SPL 2021.01-g3cfbb95f (Jan 11 2022 - 17:23:36 +0000)
Model: Texas Instruments K3 J721E SoC
Board: BBONEAI-64-B0- rev B0
SYSFW ABI: 3.1 (firmware rev 0x0015 '21.5.0--v2021.05 (Terrific Llam')
ti_i2c_eeprom_am6_parse_record: Ignoring record id 17
Trying to boot from MMC1


U-Boot 2021.01-g3cfbb95f (Jan 11 2022 - 17:23:36 +0000)

SoC:   J721E SR2.0
Model: Texas Instruments K3 J721E SoC
Board: BBONEAI-64-B0- rev B0
DRAM:  4 GiB
Flash: 0 Bytes
MMC:   sdhci@4f80000: 0, sdhci@4fb0000: 1
In:    serial@2800000
Out:   serial@2800000
Err:   serial@2800000
Error: Can't set serial# to SSSS
ti_i2c_eeprom_am6_parse_record: Ignoring record id 17
Net:   am65_cpsw_nuss_slave ethernet@46000000: K3 CPSW: nuss_ver: 0x6BA00101 cpsw_ver: 0x6BA80100 ale_ver: 0x00293904 Ports:1 mdio_freq:1000000
eth0: ethernet@46000000
Hit any key to stop autoboot:  0 
board_name=[BBONEAI-64-B0-] ...
name_fdt=[k3-j721e-beagleboneai64.dtb] ...
MMC: no card present
mmc_init: -123, time 2002
switch to partitions #0, OK
mmc0(part 0) is current device
Scanning mmc 0:1...
Found /extlinux/extlinux.conf
Retrieving file: /extlinux/extlinux.conf
209 bytes read in 8 ms (25.4 KiB/s)
1:	Linux eMMC
Retrieving file: /initrd.img
14947528 bytes read in 89 ms (160.2 MiB/s)
Retrieving file: /Image
32715264 bytes read in 185 ms (168.6 MiB/s)
append: console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000 root=/dev/mmcblk0p2 ro rootfstype=ext4 rootwait net.ifnames=0 quiet
Retrieving file: /k3-j721e-beagleboneai64.dtb
176172 bytes read in 9 ms (18.7 MiB/s)
## Flattened Device Tree blob at 88000000
   Booting using the fdt blob at 0x88000000
   Loading Ramdisk to 8f1be000, end 8ffff4c8 ... OK
   Loading Device Tree to 000000008f18f000, end 000000008f1bd02b ... OK

Starting kernel ...

@mingzhangqun have you had to deal with the WP in u-boot yet?

WKUP_GPIO0_5 (G24) --> BOARDID_EEPROM_WP

wondering what: gpio toggle 0 5 or?

@jadonk
Copy link
Sponsor Member

jadonk commented Jan 11, 2022

From what I can tell, gpio input 5 should provide the value and gpio clear 0 should disable WP, but I'm always reading the value of 0, telling me it isn't what I expect.

@RobertCNelson
Copy link
Member Author

We've also added a u-boot device tree patch to define the gpio...

beagleboard/u-boot@3d07460#diff-95c5fb931746855c7064becaa0f795dfd4d56b121d2879cdafa493ca0b9c06e1R129

@jadonk jadonk closed this as completed Nov 28, 2023
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

5 participants