[question]: what is the correct way to add other architectures?

[okawo80085]

Hi, i need to work with a good chunk of AVR, ARM and other embedded style assembly, what would be the correct way for me to the opcodes and registers for em?
Should i just add em as new xml files in opcodes/ and registers/' or is there another way to do it?

Example of the assembly im talking about

000000cc <micros>:
micros():
  cc:	9f b7       	in	r25, 0x3f	; 63
  ce:	f8 94       	cli
  d0:	88 e0       	ldi	r24, 0x08	; 8
  d2:	80 93 84 0a 	sts	0x0A84, r24	; 0x800a84 <digital_pin_to_bit_mask+0x7f7be0>
  d6:	80 91 8e 0a 	lds	r24, 0x0A8E	; 0x800a8e <digital_pin_to_bit_mask+0x7f7bea>
  da:	81 ff       	sbrs	r24, 1
  dc:	fc cf       	rjmp	.-8      	; 0xd6 <micros+0xa>
  de:	80 91 8d 0a 	lds	r24, 0x0A8D	; 0x800a8d <digital_pin_to_bit_mask+0x7f7be9>
  e2:	e0 91 a2 0a 	lds	r30, 0x0AA2	; 0x800aa2 <digital_pin_to_bit_mask+0x7f7bfe>
  e6:	f0 91 a3 0a 	lds	r31, 0x0AA3	; 0x800aa3 <digital_pin_to_bit_mask+0x7f7bff>
  ea:	20 91 20 38 	lds	r18, 0x3820	; 0x803820 <timingStruct+0x6>
  ee:	30 91 21 38 	lds	r19, 0x3821	; 0x803821 <timingStruct+0x7>
  f2:	40 91 22 38 	lds	r20, 0x3822	; 0x803822 <timingStruct+0x8>
  f6:	50 91 23 38 	lds	r21, 0x3823	; 0x803823 <timingStruct+0x9>
  fa:	9f bf       	out	0x3f, r25	; 63
  fc:	80 ff       	sbrs	r24, 0
  fe:	07 c0       	rjmp	.+14     	; 0x10e <__EEPROM_REGION_LENGTH__+0xe>
 100:	e7 30       	cpi	r30, 0x07	; 7
 102:	f1 05       	cpc	r31, r1
 104:	20 f4       	brcc	.+8      	; 0x10e <__EEPROM_REGION_LENGTH__+0xe>
 106:	2f 5f       	subi	r18, 0xFF	; 255
 108:	3f 4f       	sbci	r19, 0xFF	; 255
 10a:	4f 4f       	sbci	r20, 0xFF	; 255
 10c:	5f 4f       	sbci	r21, 0xFF	; 255
 10e:	bf 01       	movw	r22, r30
 110:	76 95       	lsr	r23
 112:	67 95       	ror	r22
 114:	cf 01       	movw	r24, r30
 116:	86 0f       	add	r24, r22
 118:	91 1d       	adc	r25, r1
 11a:	e6 2f       	mov	r30, r22
 11c:	e6 95       	lsr	r30
 11e:	e6 95       	lsr	r30
 120:	76 2f       	mov	r23, r22
 122:	72 95       	swap	r23
 124:	7f 70       	andi	r23, 0x0F	; 15
 126:	e7 1b       	sub	r30, r23
 128:	ff 0b       	sbc	r31, r31
 12a:	67 fd       	sbrc	r22, 7
 12c:	31 96       	adiw	r30, 0x01	; 1
 12e:	e8 0f       	add	r30, r24
 130:	f9 1f       	adc	r31, r25
 132:	a0 e3       	ldi	r26, 0x30	; 48
 134:	b3 e0       	ldi	r27, 0x03	; 3
 136:	ea d5       	rcall	.+3028   	; 0xd0c <__muluhisi3>
 138:	6e 0f       	add	r22, r30
 13a:	7f 1f       	adc	r23, r31
 13c:	81 1d       	adc	r24, r1
 13e:	91 1d       	adc	r25, r1
 140:	08 95       	ret

I tried just using the default configuration, but it couldn't resolve almost any of the opcodes or registers :/
It only recognized a few like nop, movw and ret, but none of the other opcodes, not even add :/

[WillLillis]

Hi! Unfortunately the project doesn't support ARM instructions yet. The instructions it is recognizing (e.g. nop, movw, etc. just happen to be instructions of the same name in x86 and/or x86-64. We currently have a #17 serving as a placeholder issue for this. The basic building blocks to add support would be:

• Design a new/ modify the existing Instruction struct to properly represent the relevant pieces of information for each ARM instruction.
• Find a reliable source/ means to generate xml files for the ARM specification. This repo's README has instructions on how to download and generate xml files for an older version of the specification. I'm not sure if/ how we would have to modify it to make it work with newer releases.
• Write an XML parser similar to what we currently have for x86 and x86-64 to convert ARM's description of their instructions into the above struct.
• Some very minor configuration/ control flow tweaks to support the new architecture option.

Finding a reliable way to pull down, generate xml files for, and parse the most recent version of the specification is definitely something we'd like to do, but just haven't had time to really dig into yet. Adding AVR would follow the same process anbd would also be a great addition to the project. Any relevant docs/information you have for this would be greatly appreciated :)

[okawo80085]

Thanks for the info, i'll do that when i catch enough free time to actually implement that, didn't know updating the Instruction struct was also needed 😅

[WillLillis]

Thanks for the info, i'll do that when i catch enough free time to actually implement that,

Sounds good! I'm hoping to take another look at it as well after school wraps up, but we'll see.

didn't know updating the Instruction struct was also needed 😅

I'm not entirely sure if that's the case, just haven't given it a close enough look yet. To be more specific, I was looking at the InstructionForm field, which is currently defined as follows:

pub struct InstructionForm {
    pub gas_name: Option<String>,
    pub go_name: Option<String>,
    pub mmx_mode: Option<MMXMode>,
    pub xmm_mode: Option<XMMMode>,
    pub cancelling_inputs: Option<bool>,
    pub nacl_version: Option<u8>,
    pub nacl_zero_extends_outputs: Option<bool>,
    pub isa: Option<ISA>,
    pub operands: Vec<Operand>,
}

Depending on what kind of information would be helpful for ARM instructions specifically, it may make sense to add or modify some of these fields. For an example, I made some modifications to the Instruction struct in #59 to provide some useful information for the Z80 language. I just haven't had a chance to really look into the ARM specifics yet :)