An in-depth investigation of Intel Core i3-8300 and ARM Cortex R5 processors(one from CISC architecture and the other from RISC architecture) covering the areas given below:
- Instruction Set Architecture of the Processor (Instruction Set, Instruction classes and Instruction Format)
- Micro-Architecture (Data Path and the Controller)
- ALU functions
- Cache Memory and Memory Interfacing
- Timing related to Memory
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Core i3-8300 is a desktop processor released in Q'2 of 2018 by Intel Corporation. It is based on Coffee Lake microarchitecture and manufactured using 14nm process. This processor is developed as a low-end performance processor with four cores, 4 threads, 3.7GHz base frequency, 8MB Intel Smart Cache and 62 W Thermal Design Power(TDP).
Cortex-R5 is a 32-bit processor by Arm Holdings, optimized for embedded real-time mission critical applications. The processor was introduced in 2011.
- Arm architecture reference manual(armv7-a and armv7-r edition)
- Arm cortex-r series programmer's guide
- Coffee Lake - Microarchitectures - Intel - WikiChip
- Cortex-r5 technical reference manual
- Denition of microarchitecture
- Intel® 64 and IA-32 Architectures Developer's Manual: Vol. 2A
- Intel® 64 and IA-32 Architectures Optimization Reference Manual
- Intel® Core™ i3-8300 Processor (8M Cache, 3.70 GHz) Product Specications
- Introduction to x64 Assembly
- Kaby Lake - Microarchitectures - Intel - WikiChip
- Skylake (client) - Microarchitectures - Intel - WikiChip
- Software Techniques for Shared-Cache Multi-Core Systems
- How Microprocessors Work
- ARM Cortex-R
- Arm Ltd. Cortex-R5