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new x86 CPU core
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@14 c046a42c-6fe2-441c-8c8c-71466251a162
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bellard committed Mar 1, 2003
1 parent 7bfdb6d commit 367e86e
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Showing 11 changed files with 3,831 additions and 543 deletions.
46 changes: 34 additions & 12 deletions Makefile
Original file line number Original file line Diff line number Diff line change
@@ -1,8 +1,9 @@
ARCH=i386 ARCH=i386
#ARCH=ppc #ARCH=ppc
HOST_CC=gcc


ifeq ($(ARCH),i386) ifeq ($(ARCH),i386)
CFLAGS=-Wall -O2 -g CFLAGS=-Wall -O2 -g -fomit-frame-pointer
LDFLAGS=-g LDFLAGS=-g
LIBS= LIBS=
CC=gcc CC=gcc
Expand All @@ -27,38 +28,59 @@ endif


######################################################### #########################################################


DEFINES+=-D_GNU_SOURCE -DGEMU -DDOSEMU #-DNO_TRACE_MSGS DEFINES+=-D_GNU_SOURCE -DGEMU -DDOSEMU -DNO_TRACE_MSGS
DEFINES+=-DCONFIG_PREFIX=\"/usr/local\"
LDSCRIPT=$(ARCH).ld LDSCRIPT=$(ARCH).ld
LIBS+=-ldl


OBJS= i386/fp87.o i386/interp_main.o i386/interp_modrm.o i386/interp_16_32.o \ OBJS= i386/fp87.o i386/interp_main.o i386/interp_modrm.o i386/interp_16_32.o \
i386/interp_32_16.o i386/interp_32_32.o i386/emu-utils.o \ i386/interp_32_16.o i386/interp_32_32.o i386/emu-utils.o \
i386/dis8086.o i386/emu-ldt.o i386/dis8086.o i386/emu-ldt.o
OBJS+=translate-i386.o op-i386.o
OBJS+= elfload.o main.o thunk.o syscall.o OBJS+= elfload.o main.o thunk.o syscall.o

SRCS = $(OBJS:.o=.c) SRCS = $(OBJS:.o=.c)


all: gemu all: gemu


gemu: $(OBJS) gemu: $(OBJS)
$(CC) -Wl,-T,$(LDSCRIPT) $(LDFLAGS) -o $@ $(OBJS) $(LIBS) $(CC) -Wl,-T,$(LDSCRIPT) $(LDFLAGS) -o $@ $^ $(LIBS)


depend: $(SRCS) depend: $(SRCS)
$(CC) -MM $(CFLAGS) $^ 1>.depend $(CC) -MM $(CFLAGS) $^ 1>.depend


# old i386 emulator
i386/interp_32_32.o: i386/interp_32_32.c i386/interp_gen.h

i386/interp_gen.h: i386/gencode
./i386/gencode > $@

i386/gencode: i386/gencode.c
$(CC) -O2 -Wall -g $< -o $@

# new i386 emulator
dyngen: dyngen.c
$(HOST_CC) -O2 -Wall -g $< -o $@

translate-i386.o: translate-i386.c op-i386.h cpu-i386.h

op-i386.h: op-i386.o dyngen
./dyngen -o $@ $<

op-i386.o: op-i386.c opreg_template.h ops_template.h
$(CC) $(CFLAGS) $(DEFINES) -c -o $@ $<

%.o: %.c %.o: %.c
$(CC) $(CFLAGS) $(DEFINES) -c -o $@ $< $(CC) $(CFLAGS) $(DEFINES) -c -o $@ $<


clean: clean:
rm -f *.o *~ i386/*.o i386/*~ gemu hello test1 test2 TAGS rm -f *.o *~ i386/*.o i386/*~ gemu TAGS

hello: hello.c
$(CC) -nostdlib $(CFLAGS) -static $(LDFLAGS) -o $@ $<


test1: test1.c # various test targets
$(CC) $(CFLAGS) -static $(LDFLAGS) -o $@ $< test speed: gemu
make -C tests $@


test2: test2.c TAGS:
$(CC) $(CFLAGS) -static $(LDFLAGS) -o $@ $< etags *.[ch] i386/*.[ch]


ifneq ($(wildcard .depend),) ifneq ($(wildcard .depend),)
include .depend include .depend
Expand Down
5 changes: 4 additions & 1 deletion TODO
Original file line number Original file line Diff line number Diff line change
@@ -1,2 +1,5 @@
- swap all elf paramters - tests
- signals
- threads
- fix printf for doubles (fp87.c bug ?) - fix printf for doubles (fp87.c bug ?)
- make it self runnable (use same trick as ld.so : include its own relocator and libc)
148 changes: 148 additions & 0 deletions cpu-i386.h
Original file line number Original file line Diff line number Diff line change
@@ -0,0 +1,148 @@
#ifndef CPU_I386_H
#define CPU_I386_H

#define R_EAX 0
#define R_ECX 1
#define R_EDX 2
#define R_EBX 3
#define R_ESP 4
#define R_EBP 5
#define R_ESI 6
#define R_EDI 7

#define R_AL 0
#define R_CL 1
#define R_DL 2
#define R_BL 3
#define R_AH 4
#define R_CH 5
#define R_DH 6
#define R_BH 7

#define R_ES 0
#define R_CS 1
#define R_SS 2
#define R_DS 3
#define R_FS 4
#define R_GS 5

#define CC_C 0x0001
#define CC_P 0x0004
#define CC_A 0x0010
#define CC_Z 0x0040
#define CC_S 0x0080
#define CC_O 0x0800

#define TRAP_FLAG 0x0100
#define INTERRUPT_FLAG 0x0200
#define DIRECTION_FLAG 0x0400
#define IOPL_FLAG_MASK 0x3000
#define NESTED_FLAG 0x4000
#define BYTE_FL 0x8000 /* Intel reserved! */
#define RF_FLAG 0x10000
#define VM_FLAG 0x20000
/* AC 0x40000 */

enum {
CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */
CC_OP_EFLAGS, /* all cc are explicitely computed, CC_SRC = flags */
CC_OP_MUL, /* modify all flags, C, O = (CC_SRC != 0) */

CC_OP_ADDB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
CC_OP_ADDW,
CC_OP_ADDL,

CC_OP_SUBB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
CC_OP_SUBW,
CC_OP_SUBL,

CC_OP_LOGICB, /* modify all flags, CC_DST = res */
CC_OP_LOGICW,
CC_OP_LOGICL,

CC_OP_INCB, /* modify all flags except, CC_DST = res */
CC_OP_INCW,
CC_OP_INCL,

CC_OP_DECB, /* modify all flags except, CC_DST = res */
CC_OP_DECW,
CC_OP_DECL,

CC_OP_SHLB, /* modify all flags, CC_DST = res, CC_SRC.lsb = C */
CC_OP_SHLW,
CC_OP_SHLL,

CC_OP_NB,
};

typedef struct CPU86State {
/* standard registers */
uint32_t regs[8];
uint32_t pc; /* cs_case + eip value */

/* eflags handling */
uint32_t eflags;
uint32_t cc_src;
uint32_t cc_dst;
uint32_t cc_op;
int32_t df; /* D flag : 1 if D = 0, -1 if D = 1 */

/* segments */
uint8_t *segs_base[6];
uint32_t segs[6];

/* emulator internal variables */
uint32_t t0; /* temporary t0 storage */
uint32_t t1; /* temporary t1 storage */
uint32_t a0; /* temporary a0 storage (address) */
} CPU86State;

static inline int ldub(void *ptr)
{
return *(uint8_t *)ptr;
}

static inline int ldsb(void *ptr)
{
return *(int8_t *)ptr;
}

static inline int lduw(void *ptr)
{
return *(uint16_t *)ptr;
}

static inline int ldsw(void *ptr)
{
return *(int16_t *)ptr;
}

static inline int ldl(void *ptr)
{
return *(uint32_t *)ptr;
}


static inline void stb(void *ptr, int v)
{
*(uint8_t *)ptr = v;
}

static inline void stw(void *ptr, int v)
{
*(uint16_t *)ptr = v;
}

static inline void stl(void *ptr, int v)
{
*(uint32_t *)ptr = v;
}

void port_outb(int addr, int val);
void port_outw(int addr, int val);
void port_outl(int addr, int val);
int port_inb(int addr);
int port_inw(int addr);
int port_inl(int addr);

#endif /* CPU_I386_H */
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