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cxgbe/base: add hardware API for Chelsio T5 series adapters
Adds hardware specific api for all the Chelsio T5 adapters under drivers/net/cxgbe/base directory. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
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/*- | ||
* BSD LICENSE | ||
* | ||
* Copyright(c) 2014-2015 Chelsio Communications. | ||
* All rights reserved. | ||
* | ||
* Redistribution and use in source and binary forms, with or without | ||
* modification, are permitted provided that the following conditions | ||
* are met: | ||
* | ||
* * Redistributions of source code must retain the above copyright | ||
* notice, this list of conditions and the following disclaimer. | ||
* * Redistributions in binary form must reproduce the above copyright | ||
* notice, this list of conditions and the following disclaimer in | ||
* the documentation and/or other materials provided with the | ||
* distribution. | ||
* * Neither the name of Chelsio Communications nor the names of its | ||
* contributors may be used to endorse or promote products derived | ||
* from this software without specific prior written permission. | ||
* | ||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | ||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | ||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | ||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | ||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | ||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | ||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | ||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
*/ | ||
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#ifndef __T4_CHIP_TYPE_H__ | ||
#define __T4_CHIP_TYPE_H__ | ||
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/* | ||
* All T4 and later chips have their PCI-E Device IDs encoded as 0xVFPP where: | ||
* | ||
* V = "4" for T4; "5" for T5, etc. or | ||
* F = "0" for PF 0..3; "4".."7" for PF4..7; and "8" for VFs | ||
* PP = adapter product designation | ||
* | ||
* We use the "version" (V) of the adpater to code the Chip Version above. | ||
*/ | ||
#define CHELSIO_PCI_ID_VER(devid) ((devid) >> 12) | ||
#define CHELSIO_PCI_ID_FUNC(devid) (((devid) >> 8) & 0xf) | ||
#define CHELSIO_PCI_ID_PROD(devid) ((devid) & 0xff) | ||
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#define CHELSIO_T4 0x4 | ||
#define CHELSIO_T5 0x5 | ||
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#define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision)) | ||
#define CHELSIO_CHIP_VERSION(code) (((code) >> 4) & 0xf) | ||
#define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf) | ||
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enum chip_type { | ||
T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1), | ||
T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2), | ||
T4_FIRST_REV = T4_A1, | ||
T4_LAST_REV = T4_A2, | ||
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T5_A0 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0), | ||
T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 1), | ||
T5_FIRST_REV = T5_A0, | ||
T5_LAST_REV = T5_A1, | ||
}; | ||
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static inline int is_t4(enum chip_type chip) | ||
{ | ||
return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4); | ||
} | ||
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static inline int is_t5(enum chip_type chip) | ||
{ | ||
return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T5); | ||
} | ||
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#endif /* __T4_CHIP_TYPE_H__ */ |
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