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Add Intel FPGA Acceleration NIC IPN3KE ethdev PMD driver. Signed-off-by: Rosen Xu <rosen.xu@intel.com> Signed-off-by: Andy Pei <andy.pei@intel.com> Signed-off-by: Dan Wei <dan.wei@intel.com>
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; | ||
; Supported features of the 'ipn3ke' network poll mode driver. | ||
; | ||
; Refer to default.ini for the full list of available PMD features. | ||
; | ||
[Features] | ||
Speed capabilities = Y | ||
Link status = Y | ||
Link status event = Y | ||
Rx interrupt = Y | ||
Queue start/stop = Y | ||
Runtime Rx queue setup = Y | ||
Runtime Tx queue setup = Y | ||
Jumbo frame = Y | ||
Scattered Rx = Y | ||
TSO = Y | ||
Promiscuous mode = Y | ||
Allmulticast mode = Y | ||
Unicast MAC filter = Y | ||
Multicast MAC filter = Y | ||
RSS hash = Y | ||
RSS key update = Y | ||
RSS reta update = Y | ||
VMDq = Y | ||
SR-IOV = Y | ||
DCB = Y | ||
VLAN filter = Y | ||
Ethertype filter = Y | ||
Tunnel filter = Y | ||
Hash filter = Y | ||
Flow director = Y | ||
Flow control = Y | ||
Flow API = Y | ||
Traffic mirroring = Y | ||
CRC offload = Y | ||
VLAN offload = Y | ||
QinQ offload = Y | ||
L3 checksum offload = Y | ||
L4 checksum offload = Y | ||
Inner L3 checksum = Y | ||
Inner L4 checksum = Y | ||
Packet type parsing = Y | ||
Timesync = Y | ||
Rx descriptor status = Y | ||
Tx descriptor status = Y | ||
Basic stats = Y | ||
Extended stats = Y | ||
FW version = Y | ||
Module EEPROM dump = Y | ||
Multiprocess aware = Y | ||
BSD nic_uio = Y | ||
Linux UIO = Y | ||
Linux VFIO = Y | ||
x86-32 = Y | ||
x86-64 = Y |
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@@ -31,6 +31,7 @@ Network Interface Controller Drivers | |
ice | ||
ifc | ||
igb | ||
ipn3ke | ||
ixgbe | ||
intel_vf | ||
kni | ||
|
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.. SPDX-License-Identifier: BSD-3-Clause | ||
Copyright(c) 2019 Intel Corporation. | ||
IPN3KE Poll Mode Driver | ||
======================= | ||
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The ipn3ke PMD (librte_pmd_ipn3ke) provides poll mode driver support | ||
for Intel® FPGA PAC(Programmable Acceleration Card) N3000 based on | ||
the Intel Ethernet Controller X710/XXV710 and Intel Arria 10 FPGA. | ||
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In this card, FPGA is an acceleration bridge between network interface | ||
and the Intel Ethernet Controller. Although both FPGA and Ethernet | ||
Controllers are connected to CPU with PCIe Gen3x16 Switch, all the | ||
packet RX/TX is handled by Intel Ethernet Controller. So from application | ||
point of view the data path is still the legacy Intel Ethernet Controller | ||
X710/XXV710 PMD. Besides this, users can enable more acceleration | ||
features by FPGA IP. | ||
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Prerequisites | ||
------------- | ||
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- Identifying your adapter using `Intel Support | ||
<http://www.intel.com/support>`_ and get the latest NVM/FW images. | ||
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- Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup the basic DPDK environment. | ||
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- To get better performance on Intel platforms, please follow the "How to get best performance with NICs on Intel platforms" | ||
section of the :ref:`Getting Started Guide for Linux <linux_gsg>`. | ||
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Pre-Installation Configuration | ||
------------------------------ | ||
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Config File Options | ||
~~~~~~~~~~~~~~~~~~~ | ||
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The following options can be modified in the ``config`` file. | ||
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- ``CONFIG_RTE_LIBRTE_IPN3KE_PMD`` (default ``y``) | ||
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Toggle compilation of the ``librte_pmd_ipn3ke`` driver. | ||
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Runtime Config Options | ||
~~~~~~~~~~~~~~~~~~~~~~ | ||
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- ``AFU name`` | ||
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AFU name identifies which AFU is used by IPN3KE. The AFU name format is "Port|BDF", | ||
Each FPGA can be divided into four blocks at most. "Port" identifies which FPGA block | ||
the AFU bitstream belongs to, but currently only 0 IPN3KE support. "BDF" means FPGA PCIe BDF. | ||
For example:: | ||
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--vdev 'ipn3ke_cfg0,afu=0|b3:00.0' | ||
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- ``FPGA Acceleration list`` | ||
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For IPN3KE FPGA can provide different bitstream, different bitstream includes different | ||
Acceleration, so users need to identify which Acceleration is used. Current IPN3KE can | ||
support TM and Flow Acceleration, for example:: | ||
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--vdev 'ipn3ke_cfg0,afu=0|b3:00.0,fpga_acc={tm|flow}' | ||
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- ``I40e PF name list`` | ||
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Users need to bind FPGA LineSidePort to FVL PF. So I40e PF name list should be involved in | ||
startup command. For example:: | ||
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--vdev 'ipn3ke_cfg0,afu=0|b3:00.0,fpga_acc={tm|flow},i40e_pf={0000:b1:00.0|0000:b1:00.1|0000:b1:00.2|0000:b1:00.3|0000:b5:00.0|0000:b5:00.1|0000:b5:00.2|0000:b5:00.3}' | ||
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Driver compilation and testing | ||
------------------------------ | ||
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Refer to the document :ref:`compiling and testing a PMD for a NIC <pmd_build_and_test>` | ||
for details. | ||
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Sample Application Notes | ||
------------------------ | ||
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Packet TX/RX with FPGA Pass-through image | ||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | ||
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FPGA Pass-through bitstream is original FPGA Image. | ||
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To start ``testpmd``, and add I40e PF to FPGA network port: | ||
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.. code-block:: console | ||
./app/testpmd -l 0-15 -n 4 --vdev 'ifpga_rawdev_cfg0,ifpga=b3:00.0,port=0' --vdev 'ipn3ke_cfg0,afu=0|b3:00.0,i40e_pf={0000:b1:00.0|0000:b1:00.1|0000:b1:00.2|0000:b1:00.3|0000:b5:00.0|0000:b5:00.1|0000:b5:00.2|0000:b5:00.3}' -- -i --no-numa --port-topology=loop | ||
HQoS and flow acceleration | ||
~~~~~~~~~~~~~~~~~~~~~~~~~~ | ||
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HQoS and flow acceleration bitstream is used to offloading HQoS and flow classifier. | ||
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To start ``testpmd``, and add I40e PF to FPGA network port, enable FPGA HQoS and Flow Acceleration: | ||
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.. code-block:: console | ||
./app/testpmd -l 0-15 -n 4 --vdev 'ifpga_rawdev_cfg0,ifpga=b3:00.0,port=0' --vdev 'ipn3ke_cfg0,afu=0|b3:00.0,fpga_acc={tm|flow},i40e_pf={0000:b1:00.0|0000:b1:00.1|0000:b1:00.2|0000:b1:00.3|0000:b5:00.0|0000:b5:00.1|0000:b5:00.2|0000:b5:00.3}' -- -i --no-numa --forward-mode=macswap | ||
Limitations or Known issues | ||
--------------------------- | ||
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19.05 limitation | ||
~~~~~~~~~~~~~~~~ | ||
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Ipn3ke code released in 19.05 is for evaluation only. |
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# SPDX-License-Identifier: BSD-3-Clause | ||
# Copyright(c) 2019 Intel Corporation | ||
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include $(RTE_SDK)/mk/rte.vars.mk | ||
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# | ||
# library name | ||
# | ||
LIB = librte_pmd_ipn3ke.a | ||
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# | ||
# Add the experimenatal APIs called from this PMD | ||
# rte_eth_switch_domain_alloc() | ||
# rte_eth_dev_create() | ||
# rte_eth_dev_destroy() | ||
# rte_eth_switch_domain_free() | ||
# | ||
CFLAGS += -DALLOW_EXPERIMENTAL_API | ||
CFLAGS += -O3 | ||
CFLAGS += $(WERROR_FLAGS) | ||
CFLAGS += -I$(RTE_SDK)/drivers/bus/ifpga | ||
LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring | ||
LDLIBS += -lrte_ethdev -lrte_net -lrte_kvargs | ||
LDLIBS += -lrte_bus_ifpga | ||
LDLIBS += -lrte_bus_vdev | ||
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EXPORT_MAP := rte_pmd_ipn3ke_version.map | ||
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LIBABIVER := 1 | ||
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# | ||
# all source are stored in SRCS-y | ||
# | ||
SRCS-$(CONFIG_RTE_LIBRTE_IPN3KE_PMD) += ipn3ke_ethdev.c | ||
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include $(RTE_SDK)/mk/rte.lib.mk |
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