net/mlx5/hws: fix port ID for root table

[ upstream commit 572fe9ef2f461b7e7e195a3a4da5bf0c11f35949 ]

In root tables matcher and rule need to have their port-id, otherwise
the translate function that done in dpdk layer will not get the right
attributes.
For that whenever the matcher is matching the source-port we need to get
the relevant port-id before calling the translate function.

Fixes: 405242c ("net/mlx5/hws: add rule object")

Signed-off-by: Erez Shitrit <erezsh@nvidia.com>
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>

drivers/net/mlx5/hws/mlx5dr_matcher.c

@@ -711,6 +711,7 @@ static int mlx5dr_matcher_init_root(struct mlx5dr_matcher *matcher)
 	struct mlx5dv_flow_match_parameters *mask;
 	struct mlx5_flow_attr flow_attr = {0};
 	struct rte_flow_error rte_error;
+	struct rte_flow_item *item;
 	uint8_t match_criteria;
 	int ret;
 
@@ -739,6 +740,22 @@ static int mlx5dr_matcher_init_root(struct mlx5dr_matcher *matcher)
 		return rte_errno;
 	}
 
+	/* We need the port id in case of matching representor */
+	item = matcher->mt[0]->items;
+	while (item->type != RTE_FLOW_ITEM_TYPE_END) {
+		if (item->type == RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR ||
+		    item->type == RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT) {
+			ret = flow_hw_get_port_id_from_ctx(ctx, &flow_attr.port_id);
+			if (ret) {
+				DR_LOG(ERR, "Failed to get port id for dev %s",
+				       ctx->ibv_ctx->device->name);
+				rte_errno = EINVAL;
+				return rte_errno;
+			}
+		}
+		++item;
+	}
+
 	mask = simple_calloc(1, MLX5_ST_SZ_BYTES(fte_match_param) +
 			     offsetof(struct mlx5dv_flow_match_parameters, match_buf));
 	if (!mask) {

drivers/net/mlx5/hws/mlx5dr_rule.c

@@ -382,10 +382,28 @@ static int mlx5dr_rule_create_root(struct mlx5dr_rule *rule,
 	struct mlx5dv_flow_match_parameters *value;
 	struct mlx5_flow_attr flow_attr = {0};
 	struct mlx5dv_flow_action_attr *attr;
+	const struct rte_flow_item *cur_item;
 	struct rte_flow_error error;
 	uint8_t match_criteria;
 	int ret;
 
+	/* We need the port id in case of matching representor */
+	cur_item = items;
+	while (cur_item->type != RTE_FLOW_ITEM_TYPE_END) {
+		if (cur_item->type == RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR ||
+		    cur_item->type == RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT) {
+			ret = flow_hw_get_port_id_from_ctx(rule->matcher->tbl->ctx,
+							   &flow_attr.port_id);
+			if (ret) {
+				DR_LOG(ERR, "Failed to get port id for dev %s",
+				       rule->matcher->tbl->ctx->ibv_ctx->device->name);
+				rte_errno = EINVAL;
+				return rte_errno;
+			}
+		}
+		++cur_item;
+	}
+
 	attr = simple_calloc(num_actions, sizeof(*attr));
 	if (!attr) {
 		rte_errno = ENOMEM;

drivers/net/mlx5/mlx5_flow.h

@@ -1594,6 +1594,28 @@ flow_hw_get_reg_id(enum rte_flow_item_type type, uint32_t id)
 	}
 }
 
+static __rte_always_inline int
+flow_hw_get_port_id_from_ctx(void *dr_ctx, uint32_t *port_val)
+{
+#if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
+	uint32_t port;
+
+	MLX5_ETH_FOREACH_DEV(port, NULL) {
+		struct mlx5_priv *priv;
+		priv = rte_eth_devices[port].data->dev_private;
+
+		if (priv->dr_ctx == dr_ctx) {
+			*port_val = port;
+			return 0;
+		}
+	}
+#else
+	RTE_SET_USED(dr_ctx);
+	RTE_SET_USED(port_val);
+#endif
+	return -EINVAL;
+}
+
 void flow_hw_set_port_info(struct rte_eth_dev *dev);
 void flow_hw_clear_port_info(struct rte_eth_dev *dev);