Eris core is:
- an artificial intelligence and machine learning (AI/ML) capable system specializing in audio signal processing.
- An electronic sub-assembly module designed to stand alone but architected for reuse;
- an integrated rapid application development & test framework
- a standardized 565 encoded graphics and audio asset library including:
- 60+ video backgrounds, 100+ oversized backgrounds which can be repositioned
- 100+ sprite based fonts (8pt-39pt) with digraph sorted kerning files
- 95K+ sprites: icons, radial gauges, virtual led indicators, game genre theme sprites and animations, etc.
- 4000+ single cycle waveforms, 30MB spectrally sorted single cycle wavetable database w/index file
- supported by a cross-platform serial to web socket interface (python) & editor software (html/websocket based)
- a low-cost high performance design for intended for use by anyone from beginners to advanced developers
**youtube video demo - pre-alpha sys stress, integration & regression testing:**
Software:
- Wren - MIT License
- LZ4 - BSD 2-Clause License
- AIeFS - GNU Affero General Public License
- Arduino/Teensyduino - MIT License
Audio: https://github.com/KristofferKarlAxelEkstrand/AKWF-FREE - http://creativecommons.org/publicdomain/zero/1.0/
Graphics: selected by availability for commercial reuse. see asset folders for license details.
densaugeo/base64@^1.2.0
fraunhofer-ims/AIfES for Arduino@^2.1.1
- Creative Commons Attribution 4.0 International Public License
- web based serial interface - MIT License
- other components - Due to 3rd party mixed license, individual sw component PENDING compliance review before formal license identification.
- Software Documentation (WIP): https://bmonkaba.github.io/ERISCore/html/
- System is currently pre-alpha.
- Software is currently pre-alpha. Interfaces may change.
- Hardware design is currently beta 2
- SLA Mechanical design is currently beta 2.
- Minor optimizations of the shell internal thin wall supports to improve SLA 3D printing accuracy
- Multi-format Serial Data (SDIO) access port / connector interface for external connectivity of sensors or HMI expansion
- 192khz@32bit stereo I/O* (hardware capable)
- Low noise linear power supply section with a balanced thermal design
- TFT screen with touch interface
- Analog/Digital (ADIO) connector for interfacing external analog inputs, digital i/o & encoder inputs
- 8 pin Multi-format Serial Data (SDIO) connector for interfacing external I2C & SPI devices
- The audio front end supports single-ended input levels from small-mV microphone inputs to 2.1-VRMS line inputs
- The front-end mixer (MIX), multiplexer (MUX), and programable gain amplifier (PGA) also supports differential (Diff), pseudo-differential, and single-ended (SE) inputs
- Custom crossover single threaded cooperative multitasking system
- Cooperative scheduler with granular realtime priority control
- Integrated Wren compiler & virtual machine (VM) - 32K for the extended PSRAM variant or 16K RAM for the base variant
- Sandboxed 1.4MB RAM filesystem with indirect access methods for utilizing system assets.
- TODO volume save/load to SD card
- VM extension allows scripts to 'request' a VM reboot to pass control to another script.
- Rapid application development framework includes dynamically editable gui controls
- Dynamic CPU clock scaling automatically maintains maximum performance while remaining within thermal limits
- Universal 'human readable' string based messaging
- Shared Data Dictionary - int32_t / float32_t hash based lookup key value store with key buffer storage (again 'human readable')
- Extends the standard Teensy 4.1 Audio library to allow full dynamic control of audio connections
- Audio block parameter controller exposes most public methods to the universal messaging system without using run time reflectors
- Sliding window 32 bit FFT Audio Block with sub-sampling control
- Oscilloscope w/ auto-scale and x-y plot C++ application example
- 2xFFT CQT Polyphonic C++ application example
- 30+ VM application examples
- Transparent LZ4 compression/decompression transport layer between the device and the web socket interface (wsi) can improve both latency and and bandwidth
- Configurable animated or static wallpaper automatically rendered at the start of each frame by the system.
- Single frame buffer. Secondary buffers implemented as surfaces.
- Multiple source/destination image block transfer (blt) interfaces:
- SD card to frame buffer
- SD card to surface
- Surface to surface
- Surface to frame buffer
- Web based development tool provides:
- Serial command interface
- Data dictionary monitor
- Audio stream flow monitor/editor
- Ram dump
- Application jitter monitor
- FFT & CQT visualization
- Scripting editor & dedicated VM serial terminal
- And more...
- NXP IMXRT1060
- ARM Cortex-M7 600 MHz w/overclock to 720 Mhz (within design enclosure)
- Float point math unit, 64 & 32 bits
- 7936K Flash, 1024K RAM (512K tightly coupled), 4K EEPROM (emulated)
- 16MB PSRAM
- 32 general purpose DMA channels
- Cryptographic Acceleration & Random Number Generator
- Programmable FlexIO
- Pixel Processing Pipeline
- 32GB SD Card
- 9v DC center negative power jack
- Low noise thermally balanced serial power supply design.
- TI PCM1864
- Resolution (Max)(Bits) 32
- Control interface I2C
- Sampling rate (Max) (kHz) 192
- ADC SNR (Typ) (dB) 103
- Power Dissipation < 145mW
- TI PCM5100A
- Architecture Delta Sigma with line driver
- Number of DAC channels (#) 2
- Analog outputs 2
- DAC SNR (Typ) (dB) 106
- Sampling rate (Max) (kHz) 384
- Control interface H/W
- Resolution (Max)(Bits) 32
- Software (SW) Control
- SW-Controlled Gain: –12 dB to +32 dB
- Power Dissipation < 145mW
- MIDI In/Out Type-A connectors
- 3rd party various
- 320x240 TFT w/ Touch
- IC driver: ILI9341
- Serial Interface
The reference product design codename "mvp-01" (minimum viable product) is a single chanel audio i/o device with two footswitches, four potentiometers, touch screen and MIDI I/O.